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ADP-N2 Data Sheet index (view source)

Revision as of 18:04, 30 October 2020

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<big><big><big>'''Adapter Board:ADP-N1 Data Sheet'''</big></big></big>
+
<big><big><big>'''Adapter Board:ADP-N2 Data Sheet（转接板ADP-N2数据手册）'''</big></big></big>
    
==Product Introduction（产品介绍）==
 
==Product Introduction（产品介绍）==
−
ADP-N1 is a camera interposer module for NVIDIA Jetson AGX Xavier & TX2 DevKit.  
+
ADP-N2 is a camera interposer module for NVIDIA Jetson TX2 DevKit.  
    
==Product Picture（产品图片）==
 
==Product Picture（产品图片）==
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|'''FRONT VIEW / 正面图片'''
 
|'''FRONT VIEW / 正面图片'''
 
|'''BACK VIEW / 背面图片'''
 
|'''BACK VIEW / 背面图片'''
−
|'''FFC CABLE/FFC线缆'''
  −
|'''SKETCH MAP/示意图'''
   
|-
 
|-
−
|'''ADP-N1'''
+
|'''ADP-N2'''
−
|[[File:ADP-N1-T.jpg|alt=|center|thumb|200x200px|'''ADP-N1-T''']]
+
|[[File:ADP-N2 01.jpg|alt=|center|thumb|200x200px]]
−
|[[File:ADP-N1-B.jpg|alt=|center|thumb|200x200px|'''ADP-N1-B''']]
+
|[[File:ADP-N2 02.jpg|alt=|center|thumb|200x200px]]
−
|[[File:FFC30-0.5-KH.jpg|alt=|center|thumb|200x200px|'''FFC28-05-3050-200-A''']]
  −
|[[File:ADP-N1-6CAM 001.jpg|alt=|center|thumb|200x200px|'''SKETCH MAP''']]
   
|}
 
|}
−
[[File:ADP-N1-T-PinList.jpg|alt=|thumb|600x600px|ADP-N1 J1/J2/J3/J4/J5/J6 PINLIST]]
+
[[File:ADP-N2 03 IF.jpg|alt=|thumb|600x600px|ADP-N2 PINLIST]]
−
[[File:ADP-N1-B-PinList.jpg|alt=|thumb|600x600px|ADP-N1 J7 PINLIST]]
+
[[File:ADP-N2 04 IF.jpg|alt=|thumb|600x600px|ADP-N2 PINLIST]]
    
==Adapter Board Pinlist（接口和引脚说明）==
 
==Adapter Board Pinlist（接口和引脚说明）==
 
{| class="wikitable"
 
{| class="wikitable"
−
| colspan="3" |'''J8：Funcation Jumper（功能选择）'''
+
| colspan="7" |'''J1 / J2 / J3'''
−
|-
  −
|'''<small>Pin NO.（引脚号）</small>'''
  −
|'''<small>NAME（名称）</small>'''
  −
|'''<small>Remarks（说明）</small>'''
  −
|-
  −
|1
  −
|CAM_VSYNC
  −
|Internal Connect with J7-86 through a level shifter（3.3V to 1.8V）
  −
|-
  −
|2
  −
|COM
  −
|Internal pull up to 3.3V, Rpu=1.5KΩ
  −
|-
  −
|3
  −
|Ext Trigger In
  −
|Internal Connect with J9-1
  −
|}
  −
{| class="wikitable"
  −
| colspan="3" |'''J9'''
  −
|-
  −
|'''<small>Pin NO.（引脚号）</small>'''
  −
|'''<small>NAME（名称）</small>'''
  −
|'''<small>Remarks（说明）</small>'''
  −
|-
  −
|1
  −
|Ext Trigger In
  −
|Internal Connect with J8-3
  −
|-
  −
|2
  −
|GND
  −
|
  −
|-
  −
|3
  −
|<small>NC</small>
  −
|
  −
|}
  −
{| class="wikitable"
  −
| colspan="2" |'''J8,J9,SW1 Functional specifications（J8,J9,SW1功能说明）'''
  −
|-
  −
|'''<small>J8 Jumper Status（J8跳选状态）</small>'''
  −
|<small>'''Remarks（说明）'''</small>
  −
|-
  −
|Short connection J8-1 and J8-2
  −
（短接J8的1、2引脚）
  −
|Select J7-86(CAM_VSYNC) as the trigger source，Only available Interconnect with TX2 platform
  −
（与TX2平台主板互联时，此时选择的是J7-86（CAM_VSYNC）作为触发源）
  −
|-
  −
| rowspan="2" |Short connection J8-2 and J8-3
  −
（短接J8的2、3引脚）
  −
|Select J9-1(Ext Trigger In) as the trigger source
  −
（此时选择的是J9-1（Ext Trigger In）作为外触发源）
  −
|-
  −
|SW1 is used for testing to simulate an external trigger signal，Internal Connect with J9-3
  −
（此时SW1模拟一个外触发信号，与J9-3引脚连接在一起）
  −
|}
  −
{| class="wikitable"
  −
| colspan="13" |'''J1 / J2 / J3 / J4 / J5 / J6'''
   
|-
 
|-
 
| rowspan="2" |'''<small>Pin NO.</small>'''
 
| rowspan="2" |'''<small>Pin NO.</small>'''
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| colspan="2" |'''<small>J2</small>'''
 
| colspan="2" |'''<small>J2</small>'''
 
| colspan="2" |'''<small>J3</small>'''
 
| colspan="2" |'''<small>J3</small>'''
−
| colspan="2" |'''<small>J4</small>'''
  −
| colspan="2" |'''<small>J5</small>'''
  −
| colspan="2" |'''<small>J6</small>'''
   
|-
 
|-
−
|'''<small>NAME</small>'''
  −
|'''<small>Remarks</small>'''
  −
|'''<small>NAME</small>'''
  −
|'''<small>Remarks</small>'''
  −
|'''<small>NAME</small>'''
  −
|'''<small>Remarks</small>'''
   
|'''<small>NAME</small>'''
 
|'''<small>NAME</small>'''
 
|'''<small>Remarks</small>'''
 
|'''<small>Remarks</small>'''
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|-
 
|-
 
|<small>1</small>
 
|<small>1</small>
−
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
   
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
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|-
 
|-
 
|<small>2</small>
 
|<small>2</small>
−
|<small>NC</small>
  −
|
  −
|<small>NC</small>
  −
|
  −
|<small>NC</small>
  −
|
   
|<small>NC</small>
 
|<small>NC</small>
 
|
 
|
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|-
 
|-
 
|<small>3</small>
 
|<small>3</small>
−
|<small>NC</small>
  −
|
  −
|<small>NC</small>
  −
|
  −
|<small>NC</small>
  −
|
   
|<small>NC</small>
 
|<small>NC</small>
 
|
 
|
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|-
 
|-
 
|<small>4</small>
 
|<small>4</small>
−
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
   
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
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|-
 
|-
 
|<small>5</small>
 
|<small>5</small>
−
|<small>NC</small>
  −
|
  −
|<small>NC</small>
  −
|
  −
|<small>NC</small>
  −
|
   
|<small>NC</small>
 
|<small>NC</small>
 
|
 
|
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|-
 
|-
 
|<small>6</small>
 
|<small>6</small>
−
|<small>NC</small>
  −
|
  −
|<small>NC</small>
  −
|
  −
|<small>NC</small>
  −
|
   
|<small>NC</small>
 
|<small>NC</small>
 
|
 
|
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|-
 
|-
 
|<small>7</small>
 
|<small>7</small>
−
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
   
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
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|
 
|
 
|<small>CSI_C_CLK_P</small>
 
|<small>CSI_C_CLK_P</small>
−
|
  −
|<small>CSI_D_CLK_P</small>
  −
|
  −
|<small>CSI_E_CLK_P</small>
  −
|
  −
|<small>CSI_F_CLK_P</small>
   
|
 
|
 
|-
 
|-
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|
 
|
 
|<small>CSI_C_CLK_N</small>
 
|<small>CSI_C_CLK_N</small>
−
|
  −
|<small>CSI_D_CLK_N</small>
  −
|
  −
|<small>CSI_E_CLK_N</small>
  −
|
  −
|<small>CSI_F_CLK_N</small>
   
|
 
|
 
|-
 
|-
 
|<small>10</small>
 
|<small>10</small>
−
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
   
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
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|
 
|
 
|<small>CSI_C_D1_P</small>
 
|<small>CSI_C_D1_P</small>
−
|
  −
|<small>CSI_D_D1_P</small>
  −
|
  −
|<small>CSI_E_D1_P</small>
  −
|
  −
|<small>CSI_F_D1_P</small>
   
|
 
|
 
|-
 
|-
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|
 
|
 
|<small>CSI_C_D1_N</small>
 
|<small>CSI_C_D1_N</small>
−
|
  −
|<small>CSI_D_D1_N</small>
  −
|
  −
|<small>CSI_E_D1_N</small>
  −
|
  −
|<small>CSI_F_D1_N</small>
   
|
 
|
 
|-
 
|-
 
|<small>13</small>
 
|<small>13</small>
−
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
   
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
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|
 
|
 
|<small>CSI_C_D0_P</small>
 
|<small>CSI_C_D0_P</small>
−
|
  −
|<small>CSI_D_D0_P</small>
  −
|
  −
|<small>CSI_E_D0_P</small>
  −
|
  −
|<small>CSI_F_D0_P</small>
   
|
 
|
 
|-
 
|-
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|
 
|
 
|<small>CSI_C_D0_N</small>
 
|<small>CSI_C_D0_N</small>
−
|
  −
|<small>CSI_D_D0_N</small>
  −
|
  −
|<small>CSI_E_D0_N</small>
  −
|
  −
|<small>CSI_F_D0_N</small>
   
|
 
|
 
|-
 
|-
 
|<small>16</small>
 
|<small>16</small>
−
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
   
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
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|-
 
|-
 
|<small>17</small>
 
|<small>17</small>
−
|<small>NC</small>
  −
|
  −
|<small>NC</small>
  −
|
  −
|<small>NC</small>
  −
|
   
|<small>NC</small>
 
|<small>NC</small>
 
|
 
|
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|-
 
|-
 
|<small>18</small>
 
|<small>18</small>
−
|<small>RESERVE</small>
  −
|<small>NC</small>
  −
|<small>RESERVE</small>
  −
|<small>NC</small>
  −
|<small>RESERVE</small>
  −
|<small>NC</small>
   
|<small>RESERVE</small>
 
|<small>RESERVE</small>
 
|<small>NC</small>
 
|<small>NC</small>
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|-
 
|-
 
|<small>19</small>
 
|<small>19</small>
−
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
   
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
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|<small>3.3V Level</small>
 
|<small>3.3V Level</small>
 
|<small>SCL2</small>
 
|<small>SCL2</small>
−
|<small>3.3V Level</small>
  −
|<small>SCL3</small>
  −
|<small>3.3V Level</small>
  −
|<small>SCL4</small>
  −
|<small>3.3V Level</small>
  −
|<small>SCL5</small>
   
|<small>3.3V Level</small>
 
|<small>3.3V Level</small>
 
|-
 
|-
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|<small>3.3V Level</small>
 
|<small>3.3V Level</small>
 
|<small>SDA2</small>
 
|<small>SDA2</small>
−
|<small>3.3V Level</small>
  −
|<small>SDA3</small>
  −
|<small>3.3V Level</small>
  −
|<small>SDA4</small>
  −
|<small>3.3V Level</small>
  −
|<small>SDA5</small>
   
|<small>3.3V Level</small>
 
|<small>3.3V Level</small>
 
|-
 
|-
 
|<small>22</small>
 
|<small>22</small>
−
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
   
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
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|-
 
|-
 
|<small>23</small>
 
|<small>23</small>
−
|<small>Sync0</small>
  −
|
  −
|<small>Sync0</small>
  −
|
  −
|<small>Sync0</small>
  −
|
   
|<small>Sync0</small>
 
|<small>Sync0</small>
 
|
 
|
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|-
 
|-
 
|<small>24</small>
 
|<small>24</small>
−
|<small>Sync1</small>
  −
|
  −
|<small>Sync1</small>
  −
|
  −
|<small>Sync1</small>
  −
|
   
|<small>Sync1</small>
 
|<small>Sync1</small>
 
|
 
|
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|-
 
|-
 
|<small>25</small>
 
|<small>25</small>
−
|<small>VDD_3V3_SLP</small>
  −
|<small>PWR OUT</small>
  −
|<small>VDD_3V3_SLP</small>
  −
|<small>PWR OUT</small>
  −
|<small>VDD_3V3_SLP</small>
  −
|<small>PWR OUT</small>
   
|<small>VDD_3V3_SLP</small>
 
|<small>VDD_3V3_SLP</small>
 
|<small>PWR OUT</small>
 
|<small>PWR OUT</small>
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|-
 
|-
 
|<small>26</small>
 
|<small>26</small>
−
|<small>VDD_3V3_SLP</small>
  −
|<small>PWR OUT</small>
  −
|<small>VDD_3V3_SLP</small>
  −
|<small>PWR OUT</small>
  −
|<small>VDD_3V3_SLP</small>
  −
|<small>PWR OUT</small>
   
|<small>VDD_3V3_SLP</small>
 
|<small>VDD_3V3_SLP</small>
 
|<small>PWR OUT</small>
 
|<small>PWR OUT</small>
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|-
 
|-
 
|<small>27</small>
 
|<small>27</small>
−
|<small>VDD_3V3_SLP</small>
  −
|<small>PWR OUT</small>
  −
|<small>VDD_3V3_SLP</small>
  −
|<small>PWR OUT</small>
  −
|<small>VDD_3V3_SLP</small>
  −
|<small>PWR OUT</small>
   
|<small>VDD_3V3_SLP</small>
 
|<small>VDD_3V3_SLP</small>
 
|<small>PWR OUT</small>
 
|<small>PWR OUT</small>
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|-
 
|-
 
|<small>28</small>
 
|<small>28</small>
−
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
  −
|<small>GND</small>
  −
|
   
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
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