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Adapter Board for Rockchip/zh (view source)
Revision as of 17:21, 25 July 2019
, 17:21, 25 July 2019→Rockchip转接板接口布局
Rockchip转接板可连接Firefly-RK3399和NanoPi以及AI0-3288C
Rockchip转接板可连接Firefly-RK3399和NanoPi以及AI0-3288C
* NanoPi连接Rockchip转接板方法：
*NanoPi连接Rockchip转接板方法：
通过0.5mm间距的30pinFFC同面线连接J3接口和NanoPi上的MIPI-CSI接口[[File:VEYENanoPi&Firefly Adapter ROCK.jpg|thumb|485x485px|用户接口实物图(前视图）]]
通过0.5mm间距的30pinFFC同面线连接J3接口和NanoPi上的MIPI-CSI接口[[File:VEYENanoPi&Firefly Adapter ROCK.jpg|thumb|485x485px|用户接口实物图(前视图）]]
===Rockchip转接板接口布局===
===Rockchip转接板接口布局===
[[File:VEYENanoPi&Firefly Adapter B .jpg|thumb|485x485px|用户接口实物图(后视图）]]
*[[File:VEYENanoPi&Firefly Adapter B .jpg|thumb|485x485px|用户接口实物图(后视图）]]'''用户接口，板间连接器J2引脚列表'''
* '''用户接口，板间连接器J2引脚列表'''
{| class="wikitable"
{| class="wikitable"
|+
|1
|1
|GND
|GND
|-
|2
|2
|MIPI_L0_N
|MIPI_L0_N
|3
|3
|MIPI_L0_P
|MIPI_L0_P
|-
|4
|4
|GND
|GND
|5
|5
|MIPI_CK_N
|MIPI_CK_N
|-
|6
|6
|MIPI_CK_P
|MIPI_CK_P
|7
|7
|GND
|GND
|-
|8
|8
|MIPI_L1_N
|MIPI_L1_1
|-
|-
|9
|9
|MIPI_L1_P
|MIPI_L1_P
|-
|10
|10
|GND
|GND
|11
|11
|MIPI_L2_N
|MIPI_L2_N
|-
|12
|12
|MIPI_L2_P
|MIPI_L2_P
|13
|13
|GND
|GND
|-
|14
|14
|MIPI_L3_N
|MIPI_L3_N
|-
|-
|15
|15
|MIPI_L3_P
|MIPI_L4_P
|-
|16
|16
|GND
|GND
|17
|17
|MIPI_MCLK0
|MIPI_MCLK0
|-
|18
|18
|GND
|GND
|19
|19
|GPIOx
|GPIOx
|-
|20
|20
|MIPI_RST
|MIPI_RST
|-
|-
|21
|21
|MIPI_SCL_1V8
|SCL_3.3V
|-
|22
|22
|MIPI_SDA_1V8
|SDA_3.3V
|-
|-
|23
|23
|GND
|GND
|-
|24
|24
|RESERVE, Not Connected
|RESERVE, Not Connected
|25
|25
|GND
|GND
|-
|26
|26
|VCC5V
|VCC5V
|27
|27
|RESERVE, Not Connected
|RESERVE, Not Connected
|-
|28
|28
|RESERVE, Not Connected
|RESERVE, Not Connected
|29
|29
|RESERVE, Not Connected
|RESERVE, Not Connected
|-
|30
|30
|RESERVE, Not Connected
|RESERVE, Not Connected
{| class="wikitable"
{| class="wikitable"
|+
|1
|1
|GND
|GND
|-
|2
|2
|MIPI_L0_N
|MIPI_L0_N
|3
|3
|MIPI_L0_P
|MIPI_L0_P
|-
|4
|4
|GND
|GND
|5
|5
|MIPI_CK_N
|MIPI_CK_N
|-
|6
|6
|MIPI_CK_P
|MIPI_CK_P
|7
|7
|GND
|GND
|-
|8
|8
|MIPI_L1_N
|MIPI_L1_N
|9
|9
|MIPI_L1_P
|MIPI_L1_P
|-
|10
|10
|GND
|GND
|11
|11
|MIPI_L2_N
|MIPI_L2_N
|-
|12
|12
|MIPI_L2_P
|MIPI_L2_P
|13
|13
|GND
|GND
|-
|14
|14
|MIPI_L3_N
|MIPI_L3_N
|15
|15
|MIPI_L3_P
|MIPI_L3_P
|-
|16
|16
|GND
|GND
|17
|17
|MIPI_MCLK0
|MIPI_MCLK0
|-
|18
|18
|GND
|GND
|19
|19
|GPIOx
|GPIOx
|-
|20
|20
|MIPI_RST
|MIPI_RST
|-
|-
|21
|21
|MIPI_SDA_1V8
|SDA_3.3V
|-
|22
|22
|MIPI_SCL_1V8
|SCL_3.3V
|-
|-
|23
|23
|RESERVE, Not Connected
|RESERVE, Not Connected
|-
|24
|24
|RESERVE, Not Connected
|RESERVE, Not Connected
|25
|25
|RESERVE, Not Connected
|RESERVE, Not Connected
|-
|26
|26
|RESERVE, Not Connected
|RESERVE, Not Connected
|27
|27
|RESERVE, Not Connected
|RESERVE, Not Connected
|-
|28
|28
|GND
|GND
|29
|29
|GND
|GND
|-
|30
|30
|VCC5V
|VCC5V
{| class="wikitable"
{| class="wikitable"
|+
|1
|1
|MIPI_L0_N
|MIPI_L0_N
|-
|2
|2
|MIPI_L0_P
|MIPI_L0_P
|3
|3
|GND
|GND
|-
|4
|4
|MIPI_L1_N
|MIPI_L1_N
|5
|5
|MIPI_L1_P
|MIPI_L1_P
|-
|6
|6
|GND
|GND
|7
|7
|MIPI_CK_N
|MIPI_CK_N
|-
|8
|8
|MIPI_CK_P
|MIPI_CK_P
|9
|9
|GND
|GND
|-
|10
|10
|MIPI_L2_N
|MIPI_L2_N
|11
|11
|MIPI_L2_P
|MIPI_L2_P
|-
|12
|12
|GND
|GND
|13
|13
|MIPI_L3_N
|MIPI_L3_N
|-
|14
|14
|MIPI_L3_P
|MIPI_L4_P
|-
|-
|15
|15
|GND
|GND
|-
|16
|16
|MIPI_MCLK0
|MIPI_MCLK0
|17
|17
|GND
|GND
|-
|18
|18
|GPIOx
|GPIOx
|19
|19
|MIPI_RST
|MIPI_RST
|-
|20
|20
|MIPI_SCL_1V8
|SCL_3.3V
|-
|-
|21
|21
|MIPI_SDA_1V8
|SDA_3.3V
|-
|22
|22
|MIPI_PWR
|MIPI_PWR
|23
|23
|CIF_PWR
|CIF_PWR
|-
|24
|24
|VCC5V
|VCC5V
|}
* J1 pin list
{| class="wikitable"
|1
|RESERVE, Not Connected
|2
|RESERVE, Not Connected
|-
|3
|GND
|4
|RESERVE, Not Connected
|-
|5
|MIPI_L3_P
|6
|RESERVE, Not Connected
|-
|7
|MIPI_L3_N
|8
|RESERVE, Not Connected
|-
|9
|GND
|10
|GND
|-
|11
|MIPI_L2_P
|12
|RESERVE, Not Connected
|-
|13
|MIPI_L2_N
|14
|RESERVE, Not Connected
|-
|15
|GND
|16
|GND
|-
|17
|MIPI_CK_P
|18
|SCL_3.3V
|-
|19
|MIPI_CK_N
|20
|SDA_3.3V
|-
|21
|GND
|22
|RESERVE, Not Connected
|-
|23
|MIPI_L1_P
|24
|RESERVE, Not Connected
|-
|25
|MIPI_L1_N
|26
|RESERVE, Not Connected
|-
|27
|GND
|28
|RESERVE, Not Connected
|-
|29
|MIPI_L0_P
|30
|RESERVE, Not Connected
|-
|31
|MIPI_L0_N
|32
|RESERVE, Not Connected
|-
|33
|GND
|34
|GND
|-
|35
|GND
|36
|GND
|-
|37
|VCC3V3
|38
|VCC3V3
|-
|39
|VCC3V3
|40
|VCC3V3
|}
|}