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FPD-LINK3-TX Data Sheet index (view source)
Revision as of 11:22, 9 October 2022
, 11:22, 9 October 2022→Board Pinlist（接口和引脚说明）
<big><big><big>'''FPD-LINK3-TX Data Sheet （FPD-LINK3-TX数据手册）'''</big></big></big>
<big><big><big>'''FPD-LINK3-TX Data Sheet （FPD-LINK3-TX数据手册）'''</big></big></big>
==Product Picture（产品图片）==
==Product Picture（产品图片）==
|[[File:FPD-LINK3-TX 01.jpg|alt=|center|thumb|200x200px]]
|[[File:FPD-LINK3-TX 01.jpg|alt=|center|thumb|200x200px]]
|[[File:FPD-LINK3-TX 02.jpg|alt=|center|thumb|200x200px]]
|[[File:FPD-LINK3-TX 02.jpg|alt=|center|thumb|200x200px]]
|}
== Thechnical Detail (技术规格) ==
{| class="wikitable"
| colspan="2" |'''Thechnical Detail (技术规格)'''
|-
| colspan="2" |'''2 MP MIPI® CSI-2 FPD-Link III serializer'''
|-
|IC PART NO.
|[https://www.ti.com/product/DS90UB953-Q1 DS90UB953-Q1] / [https://www.ti.com/product/TSER953 TSER953RHBT]
|-
|Function
|Serializer
|-
|Input Compatibility
|MIPI CSI-2
|-
|Output Compatibility
|[https://www.ti.com/interface/high-speed-serdes/fpd-link-serdes/overview.html FPD-Link III LVDS] / [https://www.ti.com/interface/high-speed-serdes/v3link-serdes/overview.html V3Link SerDes]
|-
|'''Interface'''
|
|-
|MIPI INPUT
|MIPI CSI-2 2lane (800Mbsp/lane max), J5 J6 Support
MIPI CSI-2 4lane (800Mbsp/lane max), J3 Support
|-
|MIPI INPUT Connector
|FFC socket（J3 J5），B2B Connector（J6）
|-
|LVDS OUTPUT
|FPD-Link III LVDS (4Gbps data rate)
|-
|LVDS OUTPUT Connector
|FAKRA Z Compatibility
|-
|MPIO
|Up to 4 Multi-function IO
|-
| colspan="2" |'''Device Functional Modes'''
|-
|Clocking Mode
|Synchronous Mode， FPD-Link III Clock reference derived from deserializer
|-
|FPD-Link III Operating Mode
|CSI-2 Mode
|-
|Forward Channel Mode
|Synchronous Mode
|-
|Back Channel Mode
|Synchronous Mode
|-
|FPD-Link Line Rate
|4.0 Gbps （Link with [[FPD-LINK3-2RX Data Sheet index|FPD-LINK3-2RX]]）
|-
|Back Channel Rate
|50 Mbps （Link with [[FPD-LINK3-2RX Data Sheet index|FPD-LINK3-2RX]]）
|-
| colspan="2" |'''General'''
|-
|Operating Conditions
('''Bare PCB''')
|Operating guarantee temperature：'''-20℃~85℃''', Humidity 95% or less, non-condensing
|-
|POC DC Power Input
|DC 9-15V （J2）
|-
|Dimension
|38mm*38mm
|}
|}
[[File:FPD-LINK3-TX 03 IF.jpg|alt=|thumb|600x600px|FPD-LINK3-TX Pin List]]
[[File:FPD-LINK3-TX 03 IF.jpg|alt=|thumb|600x600px|FPD-LINK3-TX Pin List]]
[[File:FPD-LINK3-TX 04 IF.jpg|alt=|thumb|600x600px|FPD-LINK3-TX Pin List]]
[[File:FPD-LINK3-TX 04 IF.jpg|alt=|thumb|600x600px|FPD-LINK3-TX Pin List]]
[[File:FPD LINK III-TX PIN.png|alt=|thumb|600x600px|FPD-LINK3-TX Pin]]
==Adapter Board Pinlist（接口和引脚说明）==
==Board Pinlist（接口和引脚说明）==
{| class="wikitable"
{| class="wikitable"
| colspan="3" |'''J1'''
| colspan="3" |'''J1:'''
'''Connect to CS-MIPI-SC132's J7'''
'''Connect to CS-MIPI-IMX307's J7'''
|-
|-
|'''<small>Pin NO.（引脚号）</small>'''
|'''<small>Pin NO.（引脚号）</small>'''
|-
|-
|1
|1
|GPIO0
|MPIO0
|
|3.3V Level
|-
|-
|2
|2
|-
|-
|3
|3
|GPIO1
|MPIO1
|
|3.3V Level
|}
|}
{| class="wikitable"
{| class="wikitable"
|-
|-
|1
|1
|GPIO2
|MPIO2
|
|3.3V Level
|-
|-
|2
|2
|-
|-
|3
|3
|GPIO3
|MPIO3
|
|3.3V Level
|}
{| class="wikitable"
| colspan="2" |'''J2'''：'''POC interface（POC接口）'''
|-
|'''Connector（接插件）'''
|'''Interface Definition（接口定义）'''
|-
|FAKRA Z
|[[File:Polarity diagram.png|center|thumb|200x200px|alt=|'''+：POC signal / -：GND''']]
|}
|}
{| class="wikitable"
{| class="wikitable"
|1
|1
|VCC3V3
|VCC3V3
|PWR
|PWR OUT
|2
|2
|VCC3V3
|VCC3V3
|PWR
|PWR OUT
|-
|-
|3
|3
| VCC3V3
| VCC3V3
|PWR
|PWR OUT
|4
|4
|VCC3V3
|VCC3V3
|PWR
|PWR OUT
|-
|-
|5
|5
|2
|2
|VCC3V3
|VCC3V3
|PWR IN
|PWR OUT
|-
|-
|3
|3
|VCC3V3
|VCC3V3
|PWR IN
|PWR OUT
|-
|-
|4
|4
|VCC3V3
|VCC3V3
|PWR IN
|PWR OUT
|-
|-
|5
|5
|8
|8
|SDA
|SDA
|
|3.3V LEVEL
|-
|-
|9
|9
|SCL
|SCL
|
|3.3V LEVEL
|-
|-
|10
|10
|11
|11
|MPIO1
|MPIO1
|
|3.3V Level
|-
|-
|12
|12
|MPIO0
|MPIO0
|
|3.3V Level
|-
|-
|13
|13
==Board Dimension（板子尺寸）==
==Board Dimension（板子尺寸）==
[[File:FPDLINK3-TX JPG DWG.jpg|alt=|none|thumb|600x600px|FPD-LINK3-TX CAD / unit:mm]]
[[Media:FPDLINK3-TX DWG.dwg|Download dwg file here]]
== PCBA 3D STP File ==
[[Media:3D FPD-LINK3-TX.zip|download 3D STP file]]