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Line 105: − [[File:VEYE-MIPI-290-327接口图.jpg|thumb|VEYE-LVDS-290/327 User Interface]] − [[File:VEYE-MIPI-290-327 CAD drawing.jpg|thumb|VEYE-MIPI-290/327 CAD drawing]] − − ===Diagram, Layout and Dimension=== − − *'''J5 pin list''' + + + + + + + + + + + + + + + + + + + + + − + + − + + + − + + − + + − + + − + + − + + + + + − + + + − + + + + + − + + + − + + + − + + + − + + + − + + + − + + + − + + + − + + + + + + + + + + − − *'''J3 pin list''' − + + + + + + + + + − − *'''J4 pin list''' − + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + − ===Imaging Effect===+ − ===CPU boards===+ Line 240:
Line 342: − ===Resources===+ − ===Update Log===+
→Thechnical Detail
[[VEYE-LVDS-290/327/zh|查看中文]]
[[VEYE-LVDS-290/327/zh|查看中文]]
[[VEYE-LVDS-290/327|<big><big><big><big>VEYE-LVDS-290/327 Data Sheet</big></big></big></big>]]
[[VEYE-LVDS-290/327|<big><big><big><big>VEYE-LVDS-290/VEYE-LVDS-327 Data Sheet</big></big></big></big>]]
==Introduction==
VEYE-LVDS-290/327 is a camera module designed by Tianjin Zhongan Yijia technology co., LTD., with excellent low illumination and wide dynamic performance.This module only has 38*38*8mm, which is convenient for integration and can be connected to various embedded motherboards with adapter board.Suitable for machine vision, intelligent analysis, industrial control, face recognition, ADAS etc...
VEYE-LVDS-290/327 is a camera module with excellent low illumination and wide dynamic performance.This module only has 38*38*8mm, which is convenient for integration and can be connected to FPGA boards with adapter board.Suitable for machine vision, intelligent analysis, industrial control, face recognition, ADAS etc...
[[File:VEYE-MIPI-290327-FRONT.jpg|thumb|front]]
[[File:VEYE-MIPI-290327-FRONT.jpg|thumb|front]]
[[File:VEYE-MIPI-290327-back.jpg|thumb|back]]
[[File:VEYE-MIPI-290327-back.jpg|thumb|back]]
==Thechnical Detail==
{| class="wikitable"
{| class="wikitable"
| colspan="2" |'''Technical Details'''
| colspan="2" |'''Technical Details'''
|Unit Cell Size
|Unit Cell Size
|2.9um (H)*2.9um(V)
|2.9um (H)*2.9um(V)
|-
|[https://www.sony-semicon.co.jp/e/products/IS/security/technology.html '''''SNR1s Value''''']
|IMX290LQR-C is 0.23lx / IMX327LQR-C is 0.18lx
|-
|-
| colspan="2" |ISP
| colspan="2" |ISP
|-
|-
|Operating Conditions
|Operating Conditions
| -10℃-50℃, Humidity 95% or less, non-condensing
('''Bare PCB''')
|Performance guarantee temperature：'''-10℃~60℃''', Humidity 95% or less, non-condensing
Operating guarantee temperature： '''-30℃~85℃''', Humidity 95% or less, non-condensing
|-
|-
|Power Supply
|Power Supply
|38mm*38mm*8mm(not include lens and lens mount)
|38mm*38mm*8mm(not include lens and lens mount)
|}
|}
==Spectral Sensitivity Characteristics==
{| class="wikitable"
|'''Sensor'''
|'''Spectral Sensitivity'''
|-
|'''IMX290LQR-C'''
|[[File:IMX290LQR-C-SS.jpg|none|thumb|400x400px|IMX290LQR-C Spectral Sensitivity|link=http://wiki.veye.cc/index.php/File:IMX290LQR-C-SS.jpg|alt=]]
|-
|'''IMX327LQR-C'''
|[[File:IMX327LQR-C-SS.jpg|link=http://wiki.veye.cc/index.php/File:IMX327LQR-C-SS.jpg|none|thumb|400x400px|IMX327LQR-C Spectral Sensitivity]]
|}[[File:VEYE-MIPI-290-327接口图.jpg|thumb|VEYE-LVDS-290/327 User Interface|alt=|600x600px]]
==Connector Pinlist==
{| class="wikitable"
{| class="wikitable"
| colspan="6" |'''J5：LVDS Interface'''
|-
|'''Pin NO.'''
|'''NAME'''
|'''Remarks'''
|'''Pin NO.'''
|'''NAME'''
|'''Remarks'''
|-
|1
|1
|RESERVE, Not Connected
|RESERVE
|NC
|2
|2
|RESERVE, Not Connected
|RESERVE
|NC
|-
|-
|3
|3
|GND
|GND
|
|4
|4
|RESERVE, Not Connected
|RESERVE
|NC
|-
|-
|5
|5
|RESERVE, Not Connected
|RESERVE
|NC
|6
|6
|RESERVE, Not Connected
|RESERVE
|NC
|-
|-
|7
|7
|RESERVE, Not Connected
|RESERVE
|NC
|8
|8
|RESERVE, Not Connected
|RESERVE
|NC
|-
|-
|9
|9
|GND
|GND
|
|10
|10
|GND
|GND
|
|-
|-
|11
|11
|LVDS_L2_P
|LVDS_L2_P
|
|12
|12
|RESERVE, Not Connected
|RESERVE
|NC
|-
|-
|13
|13
|LVDS_L2_N
|LVDS_L2_N
|
|14
|14
|RESERVE, Not Connected
|RESERVE
|NC
|-
|-
|15
|15
|GND
|GND
|
|16
|16
|GND
|GND
|
|-
|-
|17
|17
|LVDS_CK_P
|LVDS_CK_P
|
|18
|18
|SCL_3.3V
|SCL
|3.3V Level
|-
|-
|19
|19
|LVDS_CK_N
|LVDS_CK_N
|
|20
|20
|SDA_3.3V
|SDA
|3.3V Level
|-
|-
|21
|21
|GND
|GND
|
|22
|22
|RESERVE, Not Connected
|RESERVE
|NC
|-
|-
|23
|23
|LVDS_L1_P
|LVDS_L1_P
|
|24
|24
|RESERVE, Not Connected
|RESERVE
|NC
|-
|-
|25
|25
|LVDS_L1_N
|LVDS_L1_N
|
|26
|26
|RESERVE, Not Connected
|RESERVE
|NC
|-
|-
|27
|27
|GND
|GND
|
|28
|28
|RESERVE, Not Connected
|RESERVE
|NC
|-
|-
|29
|29
|LVDS_L0_P
|LVDS_L0_P
|
|30
|30
|RESERVE, Not Connected
|RESERVE
|NC
|-
|-
|31
|31
|LVDS_L0_N
|LVDS_L0_N
|
|32
|32
|RESERVE, Not Connected
|RESERVE
|NC
|-
|-
|33
|33
|GND
|GND
|
|34
|34
|GND
|GND
|
|-
|-
|35
|35
|GND
|GND
|
|36
|36
|GND
|GND
|
|-
|-
|37
|37
|VCC3V3
|VCC3V3
|PWR IN
|38
|38
|VCC3V3
|VCC3V3
|PWR IN
|-
|-
|39
|39
|VCC3V3
|VCC3V3
|PWR IN
|40
|40
|VCC3V3
|VCC3V3
|PWR IN
|}
|}
{| class="wikitable"
{| class="wikitable"
| colspan="3" |'''J3 : Day / Night External Trigger'''
|-
|'''Pin NO.'''
|'''NAME'''
|'''Remarks'''
|-
|1
|1
|Day&Night Signal In
|Day&Night Signal In
|INPUT，Active High（Image to MONO），3.3VDC to 12VDC compatibility
|-
|-
|2
|2
|GND
|GND
|
|-
|-
|3
|3
|NC
|NC
|
|}
|}
{| class="wikitable"
{| class="wikitable"
| colspan="3" |'''J4 : IRCUT Control'''
|-
|'''Pin NO.'''
|'''NAME'''
|'''Remarks'''
|-
|1
|1
|IRCUT1
|IRCUT1
|
|-
|-
|2
|2
|IRCUT2
|IRCUT2
|
|}
|}
{| class="wikitable"
| colspan="5" |'''J4 : IRCUT Control Functional specifications'''
|-
|'''MODE'''
|'''PIN'''
|'''Signal polarity'''
|'''Image type'''
|'''Filter position'''
|-
| rowspan="2" |Mode 1
|IRCUT1
| +
| rowspan="2" |color
| rowspan="2" |Infrared cutoff
|-
|IRCUT2
| -
|-
| rowspan="2" |Mode 2
|IRCUT1
| -
| rowspan="2" |mono
| rowspan="2" |Full wavelength pass
|-
|IRCUT2
| +
|}
==Board Dimension==
[[File:VEYE-MIPI-290-327 CAD drawing.jpg|thumb|VEYE-LVDS-290/327 CAD drawing|alt=|none|600x600px]]
[[Media:VEYE-MIPI-327 CAD.dwg|Download dwg file here]]
==Imaging Effect==
==CPU boards==
*Demo for FPGA usage
*Demo for FPGA usage
We provide a demo for FPGA usage,check link [https://github.com/veyeimaging/fpga here].
We provide a demo for FPGA usage,check link [https://github.com/veyeimaging/fpga here].
==Resources==
==Update Log==