Difference between revisions of "Adapter Board for Rockchip/zh"

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Line 6: Line 6:
 
Rockchip转接板可连接Firefly-RK3399和NanoPi以及AI0-3288C
 
Rockchip转接板可连接Firefly-RK3399和NanoPi以及AI0-3288C
  
−
* NanoPi连接Rockchip转接板方法：
+
*NanoPi连接Rockchip转接板方法：
  
 
通过0.5mm间距的30pinFFC同面线连接J3接口和NanoPi上的MIPI-CSI接口[[File:VEYENanoPi&Firefly Adapter ROCK.jpg|thumb|485x485px|用户接口实物图(前视图）]]
 
通过0.5mm间距的30pinFFC同面线连接J3接口和NanoPi上的MIPI-CSI接口[[File:VEYENanoPi&Firefly Adapter ROCK.jpg|thumb|485x485px|用户接口实物图(前视图）]]
  
 
===Rockchip转接板接口布局===
 
===Rockchip转接板接口布局===
 +
[[File:VEYENanoPi&Firefly Adapter B .jpg|thumb|485x485px|用户接口实物图(后视图）]]
  
−
*[[File:VEYENanoPi&Firefly Adapter B .jpg|thumb|485x485px|用户接口实物图(后视图）]]'''用户接口，板间连接器J2引脚列表'''
+
* '''用户接口，板间连接器J2引脚列表'''
  
 
{| class="wikitable"
 
{| class="wikitable"
 +
|+
 
|1
 
|1
 
|GND
 
|GND
 +
|-
 
|2
 
|2
 
|MIPI_L0_N
 
|MIPI_L0_N
Line 22: Line 25:
 
|3
 
|3
 
|MIPI_L0_P
 
|MIPI_L0_P
 +
|-
 
|4
 
|4
 
|GND
 
|GND
Line 27: Line 31:
 
|5
 
|5
 
|MIPI_CK_N
 
|MIPI_CK_N
 +
|-
 
|6
 
|6
 
|MIPI_CK_P
 
|MIPI_CK_P
Line 32: Line 37:
 
|7
 
|7
 
|GND
 
|GND
 +
|-
 
|8
 
|8
−
|MIPI_L1_N
+
|MIPI_L1_1
 
|-
 
|-
 
|9
 
|9
 
|MIPI_L1_P
 
|MIPI_L1_P
 +
|-
 
|10
 
|10
 
|GND
 
|GND
Line 42: Line 49:
 
|11
 
|11
 
|MIPI_L2_N
 
|MIPI_L2_N
 +
|-
 
|12
 
|12
 
|MIPI_L2_P
 
|MIPI_L2_P
Line 47: Line 55:
 
|13
 
|13
 
|GND
 
|GND
 +
|-
 
|14
 
|14
 
|MIPI_L3_N
 
|MIPI_L3_N
 
|-
 
|-
 
|15
 
|15
−
|MIPI_L3_P
+
|MIPI_L4_P
 +
|-
 
|16
 
|16
 
|GND
 
|GND
Line 57: Line 67:
 
|17
 
|17
 
|MIPI_MCLK0
 
|MIPI_MCLK0
 +
|-
 
|18
 
|18
 
|GND
 
|GND
Line 62: Line 73:
 
|19
 
|19
 
|GPIOx
 
|GPIOx
 +
|-
 
|20
 
|20
 
|MIPI_RST
 
|MIPI_RST
 
|-
 
|-
 
|21
 
|21
−
|MIPI_SCL_1V8
+
|SCL_3.3V
 +
|-
 
|22
 
|22
−
|MIPI_SDA_1V8
+
|SDA_3.3V
 
|-
 
|-
 
|23
 
|23
 
|GND
 
|GND
 +
|-
 
|24
 
|24
 
|RESERVE, Not Connected
 
|RESERVE, Not Connected
Line 77: Line 91:
 
|25
 
|25
 
|GND
 
|GND
 +
|-
 
|26
 
|26
 
|VCC5V
 
|VCC5V
Line 82: Line 97:
 
|27
 
|27
 
|RESERVE, Not Connected
 
|RESERVE, Not Connected
 +
|-
 
|28
 
|28
 
|RESERVE, Not Connected
 
|RESERVE, Not Connected
Line 87: Line 103:
 
|29
 
|29
 
|RESERVE, Not Connected
 
|RESERVE, Not Connected
 +
|-
 
|30
 
|30
 
|RESERVE, Not Connected
 
|RESERVE, Not Connected
Line 94: Line 111:
  
 
{| class="wikitable"
 
{| class="wikitable"
 +
|+
 
|1
 
|1
 
|GND
 
|GND
 +
|-
 
|2
 
|2
 
|MIPI_L0_N
 
|MIPI_L0_N
Line 101: Line 120:
 
|3
 
|3
 
|MIPI_L0_P
 
|MIPI_L0_P
 +
|-
 
|4
 
|4
 
|GND
 
|GND
Line 106: Line 126:
 
|5
 
|5
 
|MIPI_CK_N
 
|MIPI_CK_N
 +
|-
 
|6
 
|6
 
|MIPI_CK_P
 
|MIPI_CK_P
Line 111: Line 132:
 
|7
 
|7
 
|GND
 
|GND
 +
|-
 
|8
 
|8
 
|MIPI_L1_N
 
|MIPI_L1_N
Line 116: Line 138:
 
|9
 
|9
 
|MIPI_L1_P
 
|MIPI_L1_P
 +
|-
 
|10
 
|10
 
|GND
 
|GND
Line 121: Line 144:
 
|11
 
|11
 
|MIPI_L2_N
 
|MIPI_L2_N
 +
|-
 
|12
 
|12
 
|MIPI_L2_P
 
|MIPI_L2_P
Line 126: Line 150:
 
|13
 
|13
 
|GND
 
|GND
 +
|-
 
|14
 
|14
 
|MIPI_L3_N
 
|MIPI_L3_N
Line 131: Line 156:
 
|15
 
|15
 
|MIPI_L3_P
 
|MIPI_L3_P
 +
|-
 
|16
 
|16
 
|GND
 
|GND
Line 136: Line 162:
 
|17
 
|17
 
|MIPI_MCLK0
 
|MIPI_MCLK0
 +
|-
 
|18
 
|18
 
|GND
 
|GND
Line 141: Line 168:
 
|19
 
|19
 
|GPIOx
 
|GPIOx
 +
|-
 
|20
 
|20
 
|MIPI_RST
 
|MIPI_RST
 
|-
 
|-
 
|21
 
|21
−
|MIPI_SDA_1V8
+
|SDA_3.3V
 +
|-
 
|22
 
|22
−
|MIPI_SCL_1V8
+
|SCL_3.3V
 
|-
 
|-
 
|23
 
|23
 
|RESERVE, Not Connected
 
|RESERVE, Not Connected
 +
|-
 
|24
 
|24
 
|RESERVE, Not Connected
 
|RESERVE, Not Connected
Line 156: Line 186:
 
|25
 
|25
 
|RESERVE, Not Connected
 
|RESERVE, Not Connected
 +
|-
 
|26
 
|26
 
|RESERVE, Not Connected
 
|RESERVE, Not Connected
Line 161: Line 192:
 
|27
 
|27
 
|RESERVE, Not Connected
 
|RESERVE, Not Connected
 +
|-
 
|28
 
|28
 
|GND
 
|GND
Line 166: Line 198:
 
|29
 
|29
 
|GND
 
|GND
 +
|-
 
|30
 
|30
 
|VCC5V
 
|VCC5V
Line 173: Line 206:
  
 
{| class="wikitable"
 
{| class="wikitable"
 +
|+
 
|1
 
|1
 
|MIPI_L0_N
 
|MIPI_L0_N
 +
|-
 
|2
 
|2
 
|MIPI_L0_P
 
|MIPI_L0_P
Line 180: Line 215:
 
|3
 
|3
 
|GND
 
|GND
 +
|-
 
|4
 
|4
 
|MIPI_L1_N
 
|MIPI_L1_N
Line 185: Line 221:
 
|5
 
|5
 
|MIPI_L1_P
 
|MIPI_L1_P
 +
|-
 
|6
 
|6
 
|GND
 
|GND
Line 190: Line 227:
 
|7
 
|7
 
|MIPI_CK_N
 
|MIPI_CK_N
 +
|-
 
|8
 
|8
 
|MIPI_CK_P
 
|MIPI_CK_P
Line 195: Line 233:
 
|9
 
|9
 
|GND
 
|GND
 +
|-
 
|10
 
|10
 
|MIPI_L2_N
 
|MIPI_L2_N
Line 200: Line 239:
 
|11
 
|11
 
|MIPI_L2_P
 
|MIPI_L2_P
 +
|-
 
|12
 
|12
 
|GND
 
|GND
Line 205: Line 245:
 
|13
 
|13
 
|MIPI_L3_N
 
|MIPI_L3_N
 +
|-
 
|14
 
|14
−
|MIPI_L3_P
+
|MIPI_L4_P
 
|-
 
|-
 
|15
 
|15
 
|GND
 
|GND
 +
|-
 
|16
 
|16
 
|MIPI_MCLK0
 
|MIPI_MCLK0
Line 215: Line 257:
 
|17
 
|17
 
|GND
 
|GND
 +
|-
 
|18
 
|18
 
|GPIOx
 
|GPIOx
Line 220: Line 263:
 
|19
 
|19
 
|MIPI_RST
 
|MIPI_RST
 +
|-
 
|20
 
|20
−
|MIPI_SCL_1V8
+
|SCL_3.3V
 
|-
 
|-
 
|21
 
|21
−
|MIPI_SDA_1V8
+
|SDA_3.3V
 +
|-
 
|22
 
|22
 
|MIPI_PWR
 
|MIPI_PWR
Line 230: Line 275:
 
|23
 
|23
 
|CIF_PWR
 
|CIF_PWR
 +
|-
 
|24
 
|24
 
|VCC5V
 
|VCC5V
 +
|}
 +
 +
* J1 pin list
 +
 +
{| class="wikitable"
 +
|1
 +
|RESERVE, Not Connected
 +
|2
 +
|RESERVE, Not Connected
 +
|-
 +
|3
 +
|GND
 +
|4
 +
|RESERVE, Not Connected
 +
|-
 +
|5
 +
|MIPI_L3_P
 +
|6
 +
|RESERVE, Not Connected
 +
|-
 +
|7
 +
|MIPI_L3_N
 +
|8
 +
|RESERVE, Not Connected
 +
|-
 +
|9
 +
|GND
 +
|10
 +
|GND
 +
|-
 +
|11
 +
|MIPI_L2_P
 +
|12
 +
|RESERVE, Not Connected
 +
|-
 +
|13
 +
|MIPI_L2_N
 +
|14
 +
|RESERVE, Not Connected
 +
|-
 +
|15
 +
|GND
 +
|16
 +
|GND
 +
|-
 +
|17
 +
|MIPI_CK_P
 +
|18
 +
|SCL_3.3V
 +
|-
 +
|19
 +
|MIPI_CK_N
 +
|20
 +
|SDA_3.3V
 +
|-
 +
|21
 +
|GND
 +
|22
 +
|RESERVE, Not Connected
 +
|-
 +
|23
 +
|MIPI_L1_P
 +
|24
 +
|RESERVE, Not Connected
 +
|-
 +
|25
 +
|MIPI_L1_N
 +
|26
 +
|RESERVE, Not Connected
 +
|-
 +
|27
 +
|GND
 +
|28
 +
|RESERVE, Not Connected
 +
|-
 +
|29
 +
|MIPI_L0_P
 +
|30
 +
|RESERVE, Not Connected
 +
|-
 +
|31
 +
|MIPI_L0_N
 +
|32
 +
|RESERVE, Not Connected
 +
|-
 +
|33
 +
|GND
 +
|34
 +
|GND
 +
|-
 +
|35
 +
|GND
 +
|36
 +
|GND
 +
|-
 +
|37
 +
|VCC3V3
 +
|38
 +
|VCC3V3
 +
|-
 +
|39
 +
|VCC3V3
 +
|40
 +
|VCC3V3
 
|}
 
|}

Revision as of 17:21, 25 July 2019

English

Rockchip转接板使用说明

1 概述

Rockchip转接板可连接Firefly-RK3399和NanoPi以及AI0-3288C

  • NanoPi连接Rockchip转接板方法：

通过0.5mm间距的30pinFFC同面线连接J3接口和NanoPi上的MIPI-CSI接口

用户接口实物图(前视图）

2 Rockchip转接板接口布局

用户接口实物图(后视图）
  • 用户接口，板间连接器J2引脚列表
1 GND
2 MIPI_L0_N
3 MIPI_L0_P
4 GND
5 MIPI_CK_N
6 MIPI_CK_P
7 GND
8 MIPI_L1_1
9 MIPI_L1_P
10 GND
11 MIPI_L2_N
12 MIPI_L2_P
13 GND
14 MIPI_L3_N
15 MIPI_L4_P
16 GND
17 MIPI_MCLK0
18 GND
19 GPIOx
20 MIPI_RST
21 SCL_3.3V
22 SDA_3.3V
23 GND
24 RESERVE, Not Connected
25 GND
26 VCC5V
27 RESERVE, Not Connected
28 RESERVE, Not Connected
29 RESERVE, Not Connected
30 RESERVE, Not Connected
  • 用户接口，板间连接器J3引脚列表
1 GND
2 MIPI_L0_N
3 MIPI_L0_P
4 GND
5 MIPI_CK_N
6 MIPI_CK_P
7 GND
8 MIPI_L1_N
9 MIPI_L1_P
10 GND
11 MIPI_L2_N
12 MIPI_L2_P
13 GND
14 MIPI_L3_N
15 MIPI_L3_P
16 GND
17 MIPI_MCLK0
18 GND
19 GPIOx
20 MIPI_RST
21 SDA_3.3V
22 SCL_3.3V
23 RESERVE, Not Connected
24 RESERVE, Not Connected
25 RESERVE, Not Connected
26 RESERVE, Not Connected
27 RESERVE, Not Connected
28 GND
29 GND
30 VCC5V
  • 用户接口，板间连接器J4引脚列表
1 MIPI_L0_N
2 MIPI_L0_P
3 GND
4 MIPI_L1_N
5 MIPI_L1_P
6 GND
7 MIPI_CK_N
8 MIPI_CK_P
9 GND
10 MIPI_L2_N
11 MIPI_L2_P
12 GND
13 MIPI_L3_N
14 MIPI_L4_P
15 GND
16 MIPI_MCLK0
17 GND
18 GPIOx
19 MIPI_RST
20 SCL_3.3V
21 SDA_3.3V
22 MIPI_PWR
23 CIF_PWR
24 VCC5V
  • J1 pin list
1 RESERVE, Not Connected 2 RESERVE, Not Connected
3 GND 4 RESERVE, Not Connected
5 MIPI_L3_P 6 RESERVE, Not Connected
7 MIPI_L3_N 8 RESERVE, Not Connected
9 GND 10 GND
11 MIPI_L2_P 12 RESERVE, Not Connected
13 MIPI_L2_N 14 RESERVE, Not Connected
15 GND 16 GND
17 MIPI_CK_P 18 SCL_3.3V
19 MIPI_CK_N 20 SDA_3.3V
21 GND 22 RESERVE, Not Connected
23 MIPI_L1_P 24 RESERVE, Not Connected
25 MIPI_L1_N 26 RESERVE, Not Connected
27 GND 28 RESERVE, Not Connected
29 MIPI_L0_P 30 RESERVE, Not Connected
31 MIPI_L0_N 32 RESERVE, Not Connected
33 GND 34 GND
35 GND 36 GND
37 VCC3V3 38 VCC3V3
39 VCC3V3 40 VCC3V3
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