Difference between revisions of "ADP-N4 Adapter Board Data Sheet"

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−
<big><big><big>'''Adapter Board:ADP-N1-V2.0 Data Sheet'''</big></big></big>
+
<big><big><big>'''Addon Board:ADP-N4 Data Sheet'''</big></big></big>
  
 
==Product Introduction（产品介绍）==
 
==Product Introduction（产品介绍）==
−
ADP-N1-V2.0 is a camera interposer module for NVIDIA Jetson AGX Xavier & TX2 DevKit.  
+
ADP-N4 is a camera interposer module for NVIDIA Jetson AGX Xavier、ORIN 、TX2 DevKit.  
  
−
ADP-N1-V2.0 is an upgrade of ADP-N1,added external 12V power supply function.
+
ADP-N1-V2.0是NVIDIA Jetson AGX Xavier、ORIN、TX2开发套件的摄像头转接模块。
−
 
 
−
When 12V power supply is used, 3.3V power supply of the main board will be automatically cut off.
 
−
 
 
−
ADP-N1-V2.0是NVIDIA Jetson AGX Xavier和TX2开发套件的摄像头转接模块。
 
−
 
 
−
ADP-N1-V2.0是ADP-N1的升级款，增加了外部12V供电功能。
 
−
 
 
−
当使用12V供电时，自动切断主板3.3V供电。
 
  
 
==Product Picture（产品图片）==
 
==Product Picture（产品图片）==
Line 19: Line 11:
 
|'''FRONT VIEW / 正面图片'''
 
|'''FRONT VIEW / 正面图片'''
 
|'''BACK VIEW / 背面图片'''
 
|'''BACK VIEW / 背面图片'''
−
|'''FFC CABLE/FFC线缆'''
 
 
|-
 
|-
−
|'''ADP-N1'''
+
|'''ADP-N4'''
−
|[[File:ADP-N1-V2.0 001.jpg|alt=|center|thumb|200x200px|'''ADP-N1-V2.0''']]
+
|[[File:ADP-N4 01.jpg|alt=|center|thumb|200x200px|'''ADP-N4''']]
−
|[[File:ADP-N1-V2.0 002.jpg|alt=|center|thumb|200x200px|'''ADP-N1-V2.0''']]
+
|[[File:ADP-N4 02.jpg|alt=|center|thumb|200x200px|'''ADP-N4''']]
−
|[[File:FFC30-0.5-KH.jpg|alt=|center|thumb|200x200px|'''FFC28P-0.5MM-20CM-T''']]
 
 
|}
 
|}
−
[[File:ADP-N1-V2.0 005.jpg|alt=|thumb|600x600px|ADP-N1-V2.0 pinlist]]
 
−
[[File:ADP-N1-V2.0 006.jpg|alt=|thumb|600x600px|ADP-N1-V2.0 pinlist]]
 
−
 
 
==Adapter Board Pinlist（接口和引脚说明）==
 
==Adapter Board Pinlist（接口和引脚说明）==
−
{| class="wikitable"
 
−
| colspan="3" |'''J8：Funcation Jumper（功能选择）'''
 
−
|-
 
−
|'''<big>Pin NO.（引脚号）</big>'''
 
−
|'''<big>NAME（名称）</big>'''
 
−
|'''<big>Remarks（说明）</big>'''
 
−
|-
 
−
|1
 
−
|CAM_VSYNC
 
−
|Internal Connect with J7-86 through a level shifter（3.3V to 1.8V）
 
−
|-
 
−
|2
 
−
|COM
 
−
|Internal pull up to 3.3V, Rpu=1.5KΩ
 
−
|-
 
−
|3
 
−
|Ext Trigger In
 
−
|Internal Connect with J9-1
 
−
|}
 
−
{| class="wikitable"
 
−
| colspan="3" |'''J9'''
 
−
|-
 
−
|'''<big>Pin NO.（引脚号）</big>'''
 
−
|'''<big>NAME（名称）</big>'''
 
−
|'''<big>Remarks（说明）</big>'''
 
−
|-
 
−
|1
 
−
|Ext Trigger In
 
−
|Internal Connect with J8-3
 
−
|-
 
−
|2
 
−
|GND
 
−
|
 
−
|-
 
−
|3
 
−
|NC
 
−
|
 
−
|}
 
−
{| class="wikitable"
 
−
| colspan="3" |'''J11'''
 
−
|-
 
−
|'''<big>Pin NO.（引脚号）</big>'''
 
−
|'''<big>NAME（名称）</big>'''
 
−
|'''<big>Remarks（说明）</big>'''
 
−
|-
 
−
|1
 
−
|12VIN
 
−
|DC12V INPUT（DC12V输入）
 
−
|-
 
−
|2
 
−
|GND
 
−
|
 
−
|}
 
−
{| class="wikitable"
 
−
| colspan="2" |'''J8,J9,SW1 Functional specifications（J8,J9,SW1功能说明）'''
 
−
|-
 
−
|'''<big>J8 Jumper Status（J8跳选状态）</big>'''
 
−
|'''<big>Remarks（说明）</big>'''
 
−
|-
 
−
|Short connection J8-1 and J8-2
 
−
（短接J8的1、2引脚）
 
−
|Select J7-86(CAM_VSYNC) as the trigger source，Only available Interconnect with TX2 platform
 
−
（与TX2/TX2平台主板互联时，此时选择的是J7-86（CAM_VSYNC）作为触发源）
 
−
|-
 
−
| rowspan="2" |Short connection J8-2 and J8-3
 
−
（短接J8的2、3引脚）
 
−
|Select J9-1(Ext Trigger In) as the trigger source
 
−
（此时选择的是J9-1（Ext Trigger In）作为外触发源）
 
−
|-
 
−
|SW1 is used for testing to simulate an external trigger signal，Internal Connect with J9-3
 
−
（此时SW1模拟一个外触发信号，与J9-3引脚连接在一起）
 
−
|}
 
 
{| class="wikitable"
 
{| class="wikitable"
 
| colspan="13" |'''J1 / J2 / J3 / J4 / J5 / J6'''
 
| colspan="13" |'''J1 / J2 / J3 / J4 / J5 / J6'''
Line 141: Line 56:
 
|-
 
|-
 
|<small>2</small>
 
|<small>2</small>
 +
|<small>CAM0_TriggerIN_IO</small>
 +
|<small>触发输入，3.3V</small>
 +
|<small>CAM1_TriggerIN_IO</small>
 +
|<small>触发输入，3.3V</small>
 +
|<small>CAM2_TriggerIN_IO</small>
 +
|<small>触发输入，3.3V</small>
 +
|<small>CAM3_TriggerIN_IO</small>
 +
|<small>触发输入，3.3V</small>
 +
|<small>CAM4_TriggerIN_IO</small>
 +
|<small>触发输入，3.3V</small>
 +
|<small>CAM5_TriggerIN_IO</small>
 +
|<small>触发输入，3.3V</small>
 +
|-
 +
|<small>3</small>
 +
|<small>CAM0_OUT_IO1</small>
 +
|<small>可配置输出1，3.3V</small>
 +
|<small>CAM1_OUT_IO1</small>
 +
|<small>可配置输出1，3.3V</small>
 +
|<small>CAM2_OUT_IO1</small>
 +
|<small>可配置输出1，3.3V</small>
 +
|<small>CAM3_OUT_IO1</small>
 +
|<small>可配置输出1，3.3V</small>
 +
|<small>CAM4_OUT_IO1</small>
 +
|<small>可配置输出1，3.3V</small>
 +
|<small>CAM5_OUT_IO1</small>
 +
|<small>可配置输出1，3.3V</small>
 +
|-
 +
|<small>4</small>
 +
|<small>CAM0_OUT_IO2</small>
 +
|<small>可配置输出2，3.3V</small>
 +
|<small>CAM1_OUT_IO2</small>
 +
|<small>可配置输出2，3.3V</small>
 +
|<small>CAM2_OUT_IO2</small>
 +
|<small>可配置输出2，3.3V</small>
 +
|<small>CAM3_OUT_IO2</small>
 +
|<small>可配置输出2，3.3V</small>
 +
|<small>CAM4_OUT_IO2</small>
 +
|<small>可配置输出2，3.3V</small>
 +
|<small>CAM5_OUT_IO2</small>
 +
|<small>可配置输出2，3.3V</small>
 +
|-
 +
|<small>5</small>
 +
|<small>CAM0_GPIO3</small>
 +
|<small>预留</small>
 +
|<small>CAM1_GPIO3</small>
 +
|<small>预留</small>
 +
|<small>CAM2_GPIO3</small>
 +
|<small>预留</small>
 +
|<small>CAM3_GPIO3</small>
 +
|<small>预留</small>
 +
|<small>CAM4_GPIO3</small>
 +
|<small>预留</small>
 +
|<small>CAM5_GPIO3</small>
 +
|<small>预留</small>
 +
|-
 +
|<small>6</small>
 +
|<small>CAM0_SDA</small>
 +
|<small>I2C 数据线, 3.3V</small>
 +
|<small>CAM1_SDA</small>
 +
|<small>I2C 数据线, 3.3V</small>
 +
|<small>CAM2_SDA</small>
 +
|<small>I2C 数据线, 3.3V</small>
 +
|<small>CAM3_SDA</small>
 +
|<small>I2C 数据线, 3.3V</small>
 +
|<small>CAM4_SDA</small>
 +
|<small>I2C 数据线, 3.3V</small>
 +
|<small>CAM5_SDA</small>
 +
|<small>I2C 数据线, 3.3V</small>
 +
|-
 +
|<small>7</small>
 +
|<small>CAM0_SCL</small>
 +
|<small>I2C 时钟线, 3.3V</small>
 +
|<small>CAM1_SCL</small>
 +
|<small>I2C 时钟线, 3.3V</small>
 +
|<small>CAM2_SCL</small>
 +
|<small>I2C 时钟线, 3.3V</small>
 +
|<small>CAM3_SCL</small>
 +
|<small>I2C 时钟线, 3.3V</small>
 +
|<small>CAM4_SCL</small>
 +
|<small>I2C 时钟线, 3.3V</small>
 +
|<small>CAM5_SCL</small>
 +
|<small>I2C 时钟线, 3.3V</small>
 +
|-
 +
|<small>8</small>
 +
|<small>GND</small>
 +
|
 +
|<small>GND</small>
 +
|
 +
|<small>GND</small>
 +
|
 +
|<small>GND</small>
 +
|
 +
|<small>GND</small>
 +
|
 +
|<small>GND</small>
 +
|
 +
|-
 +
|<small>9</small>
 
|<small>NC</small>
 
|<small>NC</small>
 
|
 
|
Line 154: Line 167:
 
|
 
|
 
|-
 
|-
−
|<small>3</small>
+
|<small>10</small>
 
|<small>NC</small>
 
|<small>NC</small>
 
|
 
|
Line 168: Line 181:
 
|
 
|
 
|-
 
|-
−
|<small>4</small>
+
|<small>11</small>
 
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
Line 182: Line 195:
 
|
 
|
 
|-
 
|-
−
|<small>5</small>
+
|<small>12</small>
 
|<small>NC</small>
 
|<small>NC</small>
 
|
 
|
Line 196: Line 209:
 
|
 
|
 
|-
 
|-
−
|<small>6</small>
+
|<small>13</small>
 
|<small>NC</small>
 
|<small>NC</small>
 
|
 
|
Line 210: Line 223:
 
|
 
|
 
|-
 
|-
−
|<small>7</small>
+
|<small>14</small>
 
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
Line 224: Line 237:
 
|
 
|
 
|-
 
|-
−
|<small>8</small>
+
|<small>15</small>
 +
|<small>CAM0_MIPI_CK_P</small>
 
|<small>CSI_A_CLK_P</small>
 
|<small>CSI_A_CLK_P</small>
−
|
+
|<small>CAM1_MIPI_CK_P</small>
 
|<small>CSI_B_CLK_P</small>
 
|<small>CSI_B_CLK_P</small>
−
|
+
|<small>CAM2_MIPI_CK_P</small>
 
|<small>CSI_C_CLK_P</small>
 
|<small>CSI_C_CLK_P</small>
−
|
+
|<small>CAM3_MIPI_CK_P</small>
 
|<small>CSI_D_CLK_P</small>
 
|<small>CSI_D_CLK_P</small>
−
|
+
|<small>CAM4_MIPI_CK_P</small>
 
|<small>CSI_E_CLK_P</small>
 
|<small>CSI_E_CLK_P</small>
−
|
+
|<small>CAM5_MIPI_CK_P</small>
 
|<small>CSI_F_CLK_P</small>
 
|<small>CSI_F_CLK_P</small>
−
|
 
 
|-
 
|-
−
|<small>9</small>
+
|<small>16</small>
 +
|<small>CAM0_MIPI_CK_N</small>
 
|<small>CSI_A_CLK_N</small>
 
|<small>CSI_A_CLK_N</small>
−
|
+
|<small>CAM1_MIPI_CK_N</small>
 
|<small>CSI_B_CLK_N</small>
 
|<small>CSI_B_CLK_N</small>
−
|
+
|<small>CAM2_MIPI_CK_N</small>
 
|<small>CSI_C_CLK_N</small>
 
|<small>CSI_C_CLK_N</small>
−
|
+
|<small>CAM3_MIPI_CK_N</small>
 
|<small>CSI_D_CLK_N</small>
 
|<small>CSI_D_CLK_N</small>
−
|
+
|<small>CAM4_MIPI_CK_N</small>
 
|<small>CSI_E_CLK_N</small>
 
|<small>CSI_E_CLK_N</small>
−
|
+
|<small>CAM5_MIPI_CK_N</small>
 
|<small>CSI_F_CLK_N</small>
 
|<small>CSI_F_CLK_N</small>
−
|
 
 
|-
 
|-
−
|<small>10</small>
+
|<small>17</small>
 
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
Line 266: Line 279:
 
|
 
|
 
|-
 
|-
−
|<small>11</small>
+
|<small>18</small>
 +
|<small>CAM0_MIPI_D1_P</small>
 
|<small>CSI_A_D1_P</small>
 
|<small>CSI_A_D1_P</small>
−
|
+
|<small>CAM1_MIPI_D1_P</small>
 
|<small>CSI_B_D1_P</small>
 
|<small>CSI_B_D1_P</small>
−
|
+
|<small>CAM2_MIPI_D1_P</small>
 
|<small>CSI_C_D1_P</small>
 
|<small>CSI_C_D1_P</small>
−
|
+
|<small>CAM3_MIPI_D1_P</small>
 
|<small>CSI_D_D1_P</small>
 
|<small>CSI_D_D1_P</small>
−
|
+
|<small>CAM4_MIPI_D1_P</small>
 
|<small>CSI_E_D1_P</small>
 
|<small>CSI_E_D1_P</small>
−
|
+
|<small>CAM5_MIPI_D1_P</small>
 
|<small>CSI_F_D1_P</small>
 
|<small>CSI_F_D1_P</small>
−
|
 
 
|-
 
|-
−
|<small>12</small>
+
|<small>19</small>
 +
|<small>CAM0_MIPI_D1_N</small>
 
|<small>CSI_A_D1_N</small>
 
|<small>CSI_A_D1_N</small>
−
|
+
|<small>CAM1_MIPI_D1_N</small>
 
|<small>CSI_B_D1_N</small>
 
|<small>CSI_B_D1_N</small>
−
|
+
|<small>CAM2_MIPI_D1_N</small>
 
|<small>CSI_C_D1_N</small>
 
|<small>CSI_C_D1_N</small>
−
|
+
|<small>CAM3_MIPI_D1_N</small>
 
|<small>CSI_D_D1_N</small>
 
|<small>CSI_D_D1_N</small>
−
|
+
|<small>CAM4_MIPI_D1_N</small>
 
|<small>CSI_E_D1_N</small>
 
|<small>CSI_E_D1_N</small>
−
|
+
|<small>CAM5_MIPI_D1_N</small>
 
|<small>CSI_F_D1_N</small>
 
|<small>CSI_F_D1_N</small>
−
|
 
 
|-
 
|-
−
|<small>13</small>
+
|<small>20</small>
 
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
Line 308: Line 321:
 
|
 
|
 
|-
 
|-
−
|<small>14</small>
+
|<small>21</small>
 +
|<small>CAM0_MIPI_D0_P</small>
 
|<small>CSI_A_D0_P</small>
 
|<small>CSI_A_D0_P</small>
−
|
+
|<small>CAM1_MIPI_D0_P</small>
 
|<small>CSI_B_D0_P</small>
 
|<small>CSI_B_D0_P</small>
−
|
+
|<small>CAM2_MIPI_D0_P</small>
 
|<small>CSI_C_D0_P</small>
 
|<small>CSI_C_D0_P</small>
−
|
+
|<small>CAM3_MIPI_D0_P</small>
 
|<small>CSI_D_D0_P</small>
 
|<small>CSI_D_D0_P</small>
−
|
+
|<small>CAM4_MIPI_D0_P</small>
 
|<small>CSI_E_D0_P</small>
 
|<small>CSI_E_D0_P</small>
−
|
+
|<small>CAM5_MIPI_D0_P</small>
 
|<small>CSI_F_D0_P</small>
 
|<small>CSI_F_D0_P</small>
−
|
 
 
|-
 
|-
−
|<small>15</small>
+
|<small>22</small>
 +
|<small>CAM0_MIPI_D0_N</small>
 
|<small>CSI_A_D0_N</small>
 
|<small>CSI_A_D0_N</small>
−
|
+
|<small>CAM1_MIPI_D0_N</small>
 
|<small>CSI_B_D0_N</small>
 
|<small>CSI_B_D0_N</small>
−
|
+
|<small>CAM2_MIPI_D0_N</small>
 
|<small>CSI_C_D0_N</small>
 
|<small>CSI_C_D0_N</small>
−
|
+
|<small>CAM3_MIPI_D0_N</small>
 
|<small>CSI_D_D0_N</small>
 
|<small>CSI_D_D0_N</small>
−
|
+
|<small>CAM4_MIPI_D0_N</small>
 
|<small>CSI_E_D0_N</small>
 
|<small>CSI_E_D0_N</small>
−
|
+
|<small>CAM5_MIPI_D0_N</small>
 
|<small>CSI_F_D0_N</small>
 
|<small>CSI_F_D0_N</small>
−
|
 
 
|-
 
|-
−
|<small>16</small>
+
|<small>23</small>
 
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
Line 350: Line 363:
 
|
 
|
 
|-
 
|-
−
|<small>17</small>
+
|<small>24</small>
 
|<small>NC</small>
 
|<small>NC</small>
 
|
 
|
Line 364: Line 377:
 
|
 
|
 
|-
 
|-
−
|<small>18</small>
+
|<small>25</small>
−
|<small>RESERVE</small>
 
−
|<small>NC</small>
 
−
|<small>RESERVE</small>
 
−
|<small>NC</small>
 
−
|<small>RESERVE</small>
 
−
|<small>NC</small>
 
−
|<small>RESERVE</small>
 
−
|<small>NC</small>
 
−
|<small>RESERVE</small>
 
−
|<small>NC</small>
 
−
|<small>RESERVE</small>
 
−
|<small>NC</small>
 
−
|-
 
−
|<small>19</small>
 
 
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
Line 392: Line 391:
 
|
 
|
 
|-
 
|-
−
|<small>20</small>
+
|<small>26</small>
−
|<small>SCL0</small>
+
|<small>VCC5V</small>
−
|<small>3.3V Level</small>
+
|
−
|<small>SCL1</small>
+
|<small>VCC5V</small>
−
|<small>3.3V Level</small>
+
|
−
|<small>SCL2</small>
+
|<small>VCC5V</small>
−
|<small>3.3V Level</small>
+
|
−
|<small>SCL3</small>
+
|<small>VCC5V</small>
−
|<small>3.3V Level</small>
+
|
−
|<small>SCL4</small>
+
|<small>VCC5V</small>
−
|<small>3.3V Level</small>
+
|
−
|<small>SCL5</small>
+
|<small>VCC5V</small>
−
|<small>3.3V Level</small>
+
|
 
|-
 
|-
−
|<small>21</small>
+
|<small>27</small>
−
|<small>SDA0</small>
+
|<small>VCC5V</small>
−
|<small>3.3V Level</small>
 
−
|<small>SDA1</small>
 
−
|<small>3.3V Level</small>
 
−
|<small>SDA2</small>
 
−
|<small>3.3V Level</small>
 
−
|<small>SDA3</small>
 
−
|<small>3.3V Level</small>
 
−
|<small>SDA4</small>
 
−
|<small>3.3V Level</small>
 
−
|<small>SDA5</small>
 
−
|<small>3.3V Level</small>
 
−
|-
 
−
|<small>22</small>
 
−
|<small>GND</small>
 
 
|
 
|
−
|<small>GND</small>
+
|<small>VCC5V</small>
 
|
 
|
−
|<small>GND</small>
+
|<small>VCC5V</small>
 
|
 
|
−
|<small>GND</small>
+
|<small>VCC5V</small>
 
|
 
|
−
|<small>GND</small>
+
|<small>VCC5V</small>
 
|
 
|
−
|<small>GND</small>
+
|<small>VCC5V</small>
 
|
 
|
 
|-
 
|-
−
|<small>23</small>
+
|<small>28</small>
−
|<small>Sync0</small>
+
|<small>VCC5V</small>
 
|
 
|
−
|<small>Sync0</small>
+
|<small>VCC5V</small>
 
|
 
|
−
|<small>Sync0</small>
+
|<small>VCC5V</small>
 
|
 
|
−
|<small>Sync0</small>
+
|<small>VCC5V</small>
 
|
 
|
−
|<small>Sync0</small>
+
|<small>VCC5V</small>
 
|
 
|
−
|<small>Sync0</small>
+
|<small>VCC5V</small>
 
|
 
|
 
|-
 
|-
−
|<small>24</small>
+
|<small>29</small>
−
|<small>Sync1</small>
+
|<small>VCC5V</small>
 
|
 
|
−
|<small>Sync1</small>
+
|<small>VCC5V</small>
 
|
 
|
−
|<small>Sync1</small>
+
|<small>VCC5V</small>
 
|
 
|
−
|<small>Sync1</small>
+
|<small>VCC5V</small>
 
|
 
|
−
|<small>Sync1</small>
+
|<small>VCC5V</small>
 
|
 
|
−
|<small>Sync1</small>
+
|<small>VCC5V</small>
 
|
 
|
 
|-
 
|-
−
|<small>25</small>
+
|<small>30</small>
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|-
 
−
|<small>26</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|-
 
−
|<small>27</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|-
 
−
|<small>28</small>
 
 
|<small>GND</small>
 
|<small>GND</small>
 
|
 
|
Line 518: Line 461:
 
|
 
|
 
|}<br />
 
|}<br />
 +
[[File:ADP-N4 04.jpg|alt=|thumb|700x700px|ADP-N4]]
 +
[[File:ADP-N4 03.jpg|alt=|thumb|700x700px|ADP-N4]]
 
{| class="wikitable"
 
{| class="wikitable"
−
| colspan="12" |'''J7'''
+
| colspan="12" |'''J13'''
 
|-
 
|-
 
|'''<small>Pin NO.</small>'''
 
|'''<small>Pin NO.</small>'''
Line 924: Line 869:
 
|<small>PWR</small>
 
|<small>PWR</small>
 
|}
 
|}
 +
 +
{| class="wikitable"
 +
| colspan="16" |'''J7 / J8 / J9 / J10'''
 +
|-
 +
| colspan="4" |'''<small>J7</small>'''
 +
| colspan="4" |'''<small>J8</small>'''
 +
| colspan="4" |'''<small>J9</small>'''
 +
| colspan="4" |'''<small>J10</small>'''
 +
|-
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|-
 +
|1
 +
|<small>CAM0_TriggerIN_IO</small>
 +
|2
 +
| rowspan="6" |<small>TriggerIN_COM</small>
 +
|1
 +
|<small>CAM0_OUT_IO1</small>
 +
|2
 +
| rowspan="6" |<small>OUT_IO1_COM</small>
 +
|1
 +
|<small>CAM0_OUT_IO2</small>
 +
|2
 +
| rowspan="6" |<small>OUT_IO2_COM</small>
 +
|1
 +
|<small>CAM0_GPIO3</small>
 +
|2
 +
| rowspan="6" |<small>GPIO3_COM</small>
 +
|-
 +
|3
 +
|<small>CAM1_TriggerIN_IO</small>
 +
|4
 +
|3
 +
|<small>CAM1_OUT_IO1</small>
 +
|4
 +
|3
 +
|<small>CAM1_OUT_IO2</small>
 +
|4
 +
|3
 +
|<small>CAM1_GPIO3</small>
 +
|4
 +
|-
 +
|5
 +
|<small>CAM2_TriggerIN_IO</small>
 +
|6
 +
|5
 +
|<small>CAM2_OUT_IO1</small>
 +
|6
 +
|5
 +
|<small>CAM2_OUT_IO2</small>
 +
|6
 +
|5
 +
|<small>CAM2_GPIO3</small>
 +
|6
 +
|-
 +
|7
 +
|<small>CAM3_TriggerIN_IO</small>
 +
|8
 +
|7
 +
|<small>CAM3_OUT_IO1</small>
 +
|8
 +
|7
 +
|<small>CAM3_OUT_IO2</small>
 +
|8
 +
|7
 +
|<small>CAM3_GPIO3</small>
 +
|8
 +
|-
 +
|9
 +
|<small>CAM4_TriggerIN_IO</small>
 +
|10
 +
|9
 +
|<small>CAM4_OUT_IO1</small>
 +
|10
 +
|9
 +
|<small>CAM4_OUT_IO2</small>
 +
|10
 +
|9
 +
|<small>CAM4_GPIO3</small>
 +
|10
 +
|-
 +
|11
 +
|<small>CAM5_TriggerIN_IO</small>
 +
|12
 +
|11
 +
|<small>CAM5_OUT_IO1</small>
 +
|12
 +
|11
 +
|<small>CAM5_OUT_IO2</small>
 +
|12
 +
|11
 +
|<small>CAM5_GPIO3</small>
 +
|12
 +
|}<br />
 +
 +
{| class="wikitable"
 +
| colspan="6" |'''J19'''
 +
|-
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|'''<small>Remarks</small>'''
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|'''<small>Remarks</small>'''
 +
|-
 +
|1
 +
|<small>TriggerIN_COM</small>
 +
|
 +
|2
 +
| rowspan="5" |<small>GND</small>
 +
| rowspan="5" |
 +
|-
 +
|3
 +
|<small>OUT_IO1_COM</small>
 +
|
 +
|4
 +
|-
 +
|5
 +
|<small>OUT_IO2_COM</small>
 +
|
 +
|6
 +
|-
 +
|7
 +
|<small>GPIO3_COM</small>
 +
|
 +
|8
 +
|-
 +
|9
 +
|<small>VCC5V</small>
 +
|载板电源输入， DC5V
 +
|10
 +
|}<br />
 +
 +
{| class="wikitable"
 +
| colspan="12" |'''J14 / J15 / J16 / J17'''
 +
|-
 +
| colspan="3" |'''<small>J14</small>'''
 +
| colspan="3" |'''<small>J15</small>'''
 +
| colspan="3" |'''<small>J16</small>'''
 +
| colspan="3" |'''<small>J17</small>'''
 +
|-
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|'''<small>Remarks</small>'''
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|'''<small>Remarks</small>'''
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|'''<small>Remarks</small>'''
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|'''<small>Remarks</small>'''
 +
|-
 +
|1
 +
|<small>CAM0_TriggerIN_IO</small>
 +
| rowspan="6" |<small>触发输入，3.3V</small>
 +
|1
 +
|<small>CAM0_OUT_IO1</small>
 +
| rowspan="6" |<small>可配置输出1，3.3V</small>
 +
|1
 +
|<small>CAM0_OUT_IO2</small>
 +
| rowspan="6" |<small>可配置输出2，3.3V</small>
 +
|1
 +
|<small>CAM0_GPIO3</small>
 +
| rowspan="6" |<small>预留</small>
 +
|-
 +
|2
 +
|<small>CAM1_TriggerIN_IO</small>
 +
|2
 +
|<small>CAM1_OUT_IO1</small>
 +
|2
 +
|<small>CAM1_OUT_IO2</small>
 +
|2
 +
|<small>CAM1_GPIO3</small>
 +
|-
 +
|3
 +
|<small>CAM2_TriggerIN_IO</small>
 +
|3
 +
|<small>CAM2_OUT_IO1</small>
 +
|3
 +
|<small>CAM2_OUT_IO2</small>
 +
|3
 +
|<small>CAM2_GPIO3</small>
 +
|-
 +
|4
 +
|<small>CAM3_TriggerIN_IO</small>
 +
|4
 +
|<small>CAM3_OUT_IO1</small>
 +
|4
 +
|<small>CAM3_OUT_IO2</small>
 +
|4
 +
|<small>CAM3_GPIO3</small>
 +
|-
 +
|5
 +
|<small>CAM4_TriggerIN_IO</small>
 +
|5
 +
|<small>CAM4_OUT_IO1</small>
 +
|5
 +
|<small>CAM4_OUT_IO2</small>
 +
|5
 +
|<small>CAM4_GPIO3</small>
 +
|-
 +
|6
 +
|<small>CAM5_TriggerIN_IO</small>
 +
|6
 +
|<small>CAM5_OUT_IO1</small>
 +
|6
 +
|<small>CAM5_OUT_IO2</small>
 +
|6
 +
|<small>CAM5_GPIO3</small>
 +
|-
 +
|7
 +
|<small>GND</small>
 +
| rowspan="2" |信号地
 +
|7
 +
|<small>GND</small>
 +
| rowspan="2" |信号地
 +
|7
 +
|<small>GND</small>
 +
| rowspan="2" |信号地
 +
|7
 +
|<small>GND</small>
 +
| rowspan="2" |信号地
 +
|-
 +
|8
 +
|<small>GND</small>
 +
|8
 +
|<small>GND</small>
 +
|8
 +
|<small>GND</small>
 +
|8
 +
|<small>GND</small>
 +
|}<br />
 +
 +
{| class="wikitable"
 +
| colspan="5" |'''J11'''
 +
|-
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|'''<small>Remarks</small>'''
 +
|'''<small>Pin NO.</small>'''
 +
|'''Name'''
 +
|-
 +
|1
 +
|<small>EXT_VCC</small>
 +
|外部电源输入， DC12V
 +
|2
 +
|<small>GND</small>
 +
|}<br />
  
 
==Adapter Board Dimension（板子尺寸）==
 
==Adapter Board Dimension（板子尺寸）==
−
[[File:ADP-N1-V2.0-CAD.jpg|alt=|none|thumb|800x800px|ADP-N1-V2.0 CAD / unit:mm]]
+
[[File:ADP-N4-V11 jpeg.jpg|center|thumb|600x600px]]
−
[[Media:ADP-N1-V2.0-DWG.dwg|Download dwg file here]]
+
 
 +
[[Media:ADP-N4-V11_2D.7z|Download 2D file here]]
 
== PCBA 3D STP File（PCBA 3D STP文件）==
 
== PCBA 3D STP File（PCBA 3D STP文件）==
−
[[Media:3D ADP-N1-V2.0.zip|download 3D STP file]]
+
[[Media:ADP-N4-V11_3D.7z|Download 3D file here]]

Latest revision as of 16:07, 22 February 2023

Addon Board:ADP-N4 Data Sheet

1 Product Introduction（产品介绍）

ADP-N4 is a camera interposer module for NVIDIA Jetson AGX Xavier、ORIN 、TX2 DevKit.

ADP-N1-V2.0是NVIDIA Jetson AGX Xavier、ORIN、TX2开发套件的摄像头转接模块。

2 Product Picture（产品图片）

PART NUMBER / 型号 FRONT VIEW / 正面图片 BACK VIEW / 背面图片
ADP-N4
ADP-N4
ADP-N4

3 Adapter Board Pinlist（接口和引脚说明）

J1 / J2 / J3 / J4 / J5 / J6
Pin NO. J1 J2 J3 J4 J5 J6
NAME Remarks NAME Remarks NAME Remarks NAME Remarks NAME Remarks NAME Remarks
1 GND GND GND GND GND GND
2 CAM0_TriggerIN_IO 触发输入，3.3V CAM1_TriggerIN_IO 触发输入，3.3V CAM2_TriggerIN_IO 触发输入，3.3V CAM3_TriggerIN_IO 触发输入，3.3V CAM4_TriggerIN_IO 触发输入，3.3V CAM5_TriggerIN_IO 触发输入，3.3V
3 CAM0_OUT_IO1 可配置输出1，3.3V CAM1_OUT_IO1 可配置输出1，3.3V CAM2_OUT_IO1 可配置输出1，3.3V CAM3_OUT_IO1 可配置输出1，3.3V CAM4_OUT_IO1 可配置输出1，3.3V CAM5_OUT_IO1 可配置输出1，3.3V
4 CAM0_OUT_IO2 可配置输出2，3.3V CAM1_OUT_IO2 可配置输出2，3.3V CAM2_OUT_IO2 可配置输出2，3.3V CAM3_OUT_IO2 可配置输出2，3.3V CAM4_OUT_IO2 可配置输出2，3.3V CAM5_OUT_IO2 可配置输出2，3.3V
5 CAM0_GPIO3 预留 CAM1_GPIO3 预留 CAM2_GPIO3 预留 CAM3_GPIO3 预留 CAM4_GPIO3 预留 CAM5_GPIO3 预留
6 CAM0_SDA I2C 数据线, 3.3V CAM1_SDA I2C 数据线, 3.3V CAM2_SDA I2C 数据线, 3.3V CAM3_SDA I2C 数据线, 3.3V CAM4_SDA I2C 数据线, 3.3V CAM5_SDA I2C 数据线, 3.3V
7 CAM0_SCL I2C 时钟线, 3.3V CAM1_SCL I2C 时钟线, 3.3V CAM2_SCL I2C 时钟线, 3.3V CAM3_SCL I2C 时钟线, 3.3V CAM4_SCL I2C 时钟线, 3.3V CAM5_SCL I2C 时钟线, 3.3V
8 GND GND GND GND GND GND
9 NC NC NC NC NC NC
10 NC NC NC NC NC NC
11 GND GND GND GND GND GND
12 NC NC NC NC NC NC
13 NC NC NC NC NC NC
14 GND GND GND GND GND GND
15 CAM0_MIPI_CK_P CSI_A_CLK_P CAM1_MIPI_CK_P CSI_B_CLK_P CAM2_MIPI_CK_P CSI_C_CLK_P CAM3_MIPI_CK_P CSI_D_CLK_P CAM4_MIPI_CK_P CSI_E_CLK_P CAM5_MIPI_CK_P CSI_F_CLK_P
16 CAM0_MIPI_CK_N CSI_A_CLK_N CAM1_MIPI_CK_N CSI_B_CLK_N CAM2_MIPI_CK_N CSI_C_CLK_N CAM3_MIPI_CK_N CSI_D_CLK_N CAM4_MIPI_CK_N CSI_E_CLK_N CAM5_MIPI_CK_N CSI_F_CLK_N
17 GND GND GND GND GND GND
18 CAM0_MIPI_D1_P CSI_A_D1_P CAM1_MIPI_D1_P CSI_B_D1_P CAM2_MIPI_D1_P CSI_C_D1_P CAM3_MIPI_D1_P CSI_D_D1_P CAM4_MIPI_D1_P CSI_E_D1_P CAM5_MIPI_D1_P CSI_F_D1_P
19 CAM0_MIPI_D1_N CSI_A_D1_N CAM1_MIPI_D1_N CSI_B_D1_N CAM2_MIPI_D1_N CSI_C_D1_N CAM3_MIPI_D1_N CSI_D_D1_N CAM4_MIPI_D1_N CSI_E_D1_N CAM5_MIPI_D1_N CSI_F_D1_N
20 GND GND GND GND GND GND
21 CAM0_MIPI_D0_P CSI_A_D0_P CAM1_MIPI_D0_P CSI_B_D0_P CAM2_MIPI_D0_P CSI_C_D0_P CAM3_MIPI_D0_P CSI_D_D0_P CAM4_MIPI_D0_P CSI_E_D0_P CAM5_MIPI_D0_P CSI_F_D0_P
22 CAM0_MIPI_D0_N CSI_A_D0_N CAM1_MIPI_D0_N CSI_B_D0_N CAM2_MIPI_D0_N CSI_C_D0_N CAM3_MIPI_D0_N CSI_D_D0_N CAM4_MIPI_D0_N CSI_E_D0_N CAM5_MIPI_D0_N CSI_F_D0_N
23 GND GND GND GND GND GND
24 NC NC NC NC NC NC
25 GND GND GND GND GND GND
26 VCC5V VCC5V VCC5V VCC5V VCC5V VCC5V
27 VCC5V VCC5V VCC5V VCC5V VCC5V VCC5V
28 VCC5V VCC5V VCC5V VCC5V VCC5V VCC5V
29 VCC5V VCC5V VCC5V VCC5V VCC5V VCC5V
30 GND GND GND GND GND GND


ADP-N4
ADP-N4
J13
Pin NO. NAME Remarks Pin NO. NAME Remarks Pin NO. NAME Remarks Pin NO. NAME Remarks
1 CSI_A_D0_P 31 CSI_C_D1_P 61 NC 91 NC
2 CSI_B_D0_P 32 CSI_D_D1_P 62 NC 92 NC
3 CSI_A_D0_N 33 CSI_C_D1_N 63 NC 93 NC
4 CSI_B_D0_N 34 CSI_D_D1_N 64 NC 94 NC
5 GND 35 GND 65 NC 95 NC
6 GND 36 GND 66 NC 96 NC
7 CSI_A_CLK_P 37 CSI_E_D0_P 67 NC 97 NC
8 CSI_B_CLK_P 38 CSI_F_D0_P 68 NC 98 NC
9 CSI_A_CLK_N 39 CSI_E_D0_N 69 GND 99 GND
10 CSI_B_CLK_N 40 CSI_F_D0_N 70 GND 100 GND
11 GND 41 GND 71 NC 101 NC
12 GND 42 GND 72 NC 102 NC
13 CSI_A_D1_P 43 CSI_E_CLK_P 73 NC 103 NC
14 CSI_B_D1_P 44 CSI_F_CLK_P 74 NC 104 NC
15 CSI_A_D1_N 45 CSI_E_CLK_N 75 CAM_I2C_SCL 1.8V Level 105 NC
16 CSI_B_D1_N 46 CSI_F_CLK_N 76 NC 106 NC
17 GND 47 GND 77 CAM_I2C_SDA 1.8V Level 107 NC
18 GND 48 GND 78 NC 108 VDD_3V3_SLP PWR
19 CSI_C_D0_P 49 CSI_E_D1_P 79 GND 109 VDD_5V0_IO_SYS PWR
20 CSI_D_D0_P 50 CSI_F_D1_P 80 GND 110 VDD_3V3_SLP PWR
21 CSI_C_D0_N 51 CSI_E_D1_N 81 NC 111 NC
22 CSI_D_D0_N 52 CSI_F_D1_N 82 NC 112 NC
23 GND 53 GND 83 NC 113 NC
24 GND 54 GND 84 VDD_3V3_SLP PWR 114 NC
25 CSI_C_CLK_P 55 NC 85 NC 115 GND
26 CSI_D_CLK_P 56 NC 86 CAM_VSYNC RESERVE 116 GND
27 CSI_C_CLK_N 57 NC 87 NC 117 NC
28 CSI_D_CLK_N 58 NC 88 NC 118 TX2 ：VDD_5V0_IO_SYS AGX：VDD_3V3_IO_SYS PWR
29 GND 59 NC 89 NC 119 NC
30 GND 60 NC 90 NC 120 TX2 ：VDD_5V0_IO_SYS AGX：VDD_3V3_IO_SYS PWR
J7 / J8 / J9 / J10
J7 J8 J9 J10
Pin NO. Name Pin NO. Name Pin NO. Name Pin NO. Name Pin NO. Name Pin NO. Name Pin NO. Name Pin NO. Name
1 CAM0_TriggerIN_IO 2 TriggerIN_COM 1 CAM0_OUT_IO1 2 OUT_IO1_COM 1 CAM0_OUT_IO2 2 OUT_IO2_COM 1 CAM0_GPIO3 2 GPIO3_COM
3 CAM1_TriggerIN_IO 4 3 CAM1_OUT_IO1 4 3 CAM1_OUT_IO2 4 3 CAM1_GPIO3 4
5 CAM2_TriggerIN_IO 6 5 CAM2_OUT_IO1 6 5 CAM2_OUT_IO2 6 5 CAM2_GPIO3 6
7 CAM3_TriggerIN_IO 8 7 CAM3_OUT_IO1 8 7 CAM3_OUT_IO2 8 7 CAM3_GPIO3 8
9 CAM4_TriggerIN_IO 10 9 CAM4_OUT_IO1 10 9 CAM4_OUT_IO2 10 9 CAM4_GPIO3 10
11 CAM5_TriggerIN_IO 12 11 CAM5_OUT_IO1 12 11 CAM5_OUT_IO2 12 11 CAM5_GPIO3 12


J19
Pin NO. Name Remarks Pin NO. Name Remarks
1 TriggerIN_COM 2 GND
3 OUT_IO1_COM 4
5 OUT_IO2_COM 6
7 GPIO3_COM 8
9 VCC5V 载板电源输入， DC5V 10


J14 / J15 / J16 / J17
J14 J15 J16 J17
Pin NO. Name Remarks Pin NO. Name Remarks Pin NO. Name Remarks Pin NO. Name Remarks
1 CAM0_TriggerIN_IO 触发输入，3.3V 1 CAM0_OUT_IO1 可配置输出1，3.3V 1 CAM0_OUT_IO2 可配置输出2，3.3V 1 CAM0_GPIO3 预留
2 CAM1_TriggerIN_IO 2 CAM1_OUT_IO1 2 CAM1_OUT_IO2 2 CAM1_GPIO3
3 CAM2_TriggerIN_IO 3 CAM2_OUT_IO1 3 CAM2_OUT_IO2 3 CAM2_GPIO3
4 CAM3_TriggerIN_IO 4 CAM3_OUT_IO1 4 CAM3_OUT_IO2 4 CAM3_GPIO3
5 CAM4_TriggerIN_IO 5 CAM4_OUT_IO1 5 CAM4_OUT_IO2 5 CAM4_GPIO3
6 CAM5_TriggerIN_IO 6 CAM5_OUT_IO1 6 CAM5_OUT_IO2 6 CAM5_GPIO3
7 GND 信号地 7 GND 信号地 7 GND 信号地 7 GND 信号地
8 GND 8 GND 8 GND 8 GND


J11
Pin NO. Name Remarks Pin NO. Name
1 EXT_VCC 外部电源输入， DC12V 2 GND


4 Adapter Board Dimension（板子尺寸）

ADP-N4-V11 jpeg.jpg

Download 2D file here

5 PCBA 3D STP File（PCBA 3D STP文件）

Download 3D file here

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