Difference between revisions of "FPD-LINK3-TX Data Sheet index"

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(Created page with "<big><big><big>'''Adapter Board:ADP-N1 Data Sheet'''</big></big></big> ==Product Introduction（产品介绍）== ADP-N1 is a camera interposer module for NVIDIA Jetson AGX X...")
 
 
(45 intermediate revisions by the same user not shown)
Line 1: Line 1:
−
<big><big><big>'''Adapter Board:ADP-N1 Data Sheet'''</big></big></big>
+
<big><big><big>'''FPD-LINK3-TX Data Sheet （FPD-LINK3-TX数据手册）'''</big></big></big>
−
 
 
−
==Product Introduction（产品介绍）==
 
−
ADP-N1 is a camera interposer module for NVIDIA Jetson AGX Xavier & TX2 DevKit.
 
  
 
==Product Picture（产品图片）==
 
==Product Picture（产品图片）==
Line 9: Line 6:
 
|'''FRONT VIEW / 正面图片'''
 
|'''FRONT VIEW / 正面图片'''
 
|'''BACK VIEW / 背面图片'''
 
|'''BACK VIEW / 背面图片'''
−
|'''FFC CABLE/FFC线缆'''
 
−
|'''SKETCH MAP/示意图'''
 
 
|-
 
|-
−
|'''ADP-N1'''
+
|'''FPD-LINK3-TX'''
−
|[[File:ADP-N1-T.jpg|alt=|center|thumb|200x200px|'''ADP-N1-T''']]
+
|[[File:FPD-LINK3-TX 01.jpg|alt=|center|thumb|200x200px]]
−
|[[File:ADP-N1-B.jpg|alt=|center|thumb|200x200px|'''ADP-N1-B''']]
+
|[[File:FPD-LINK3-TX 02.jpg|alt=|center|thumb|200x200px]]
−
|[[File:FFC30-0.5-KH.jpg|alt=|center|thumb|200x200px|'''FFC28-05-3050-200-A''']]
 
−
|[[File:ADP-N1-6CAM 001.jpg|alt=|center|thumb|200x200px|'''SKETCH MAP''']]
 
 
|}
 
|}
−
[[File:ADP-N1-T-PinList.jpg|alt=|thumb|600x600px|ADP-N1 J1/J2/J3/J4/J5/J6 PINLIST]]
 
−
[[File:ADP-N1-B-PinList.jpg|alt=|thumb|600x600px|ADP-N1 J7 PINLIST]]
 
  
−
==Adapter Board Pinlist（接口和引脚说明）==
+
== Thechnical Detail (技术规格) ==
 
{| class="wikitable"
 
{| class="wikitable"
−
| colspan="3" |'''J8：Funcation Jumper（功能选择）'''
+
| colspan="2" |'''Thechnical Detail (技术规格)'''
 +
|-
 +
| colspan="2" |'''2 MP MIPI® CSI-2 FPD-Link III serializer'''
 +
|-
 +
|IC PART NO.
 +
|[https://www.ti.com/product/DS90UB953-Q1 DS90UB953-Q1] / [https://www.ti.com/product/TSER953 TSER953RHBT]
 +
|-
 +
|Function
 +
|Serializer
 +
|-
 +
|Input Compatibility
 +
|MIPI CSI-2
 +
|-
 +
|Output Compatibility
 +
|[https://www.ti.com/interface/high-speed-serdes/fpd-link-serdes/overview.html FPD-Link III LVDS] / [https://www.ti.com/interface/high-speed-serdes/v3link-serdes/overview.html V3Link SerDes]
 +
|-
 +
|'''Interface'''
 +
|
 +
|-
 +
|MIPI INPUT
 +
|MIPI CSI-2 2lane (800Mbsp/lane max), J5 J6 Support
 +
MIPI CSI-2 4lane (800Mbsp/lane max), J3 Support
 +
|-
 +
|MIPI INPUT Connector
 +
|FFC socket（J3 J5），B2B Connector（J6）
 +
|-
 +
|LVDS OUTPUT
 +
|FPD-Link III LVDS (4Gbps data rate)
 +
|-
 +
|LVDS OUTPUT Connector
 +
|FAKRA Z Compatibility
 +
|-
 +
|MPIO
 +
|Up to 4 Multi-function IO
 +
|-
 +
| colspan="2" |'''Device Functional Modes'''
 +
|-
 +
|Clocking Mode
 +
|Synchronous Mode， FPD-Link III Clock reference derived from deserializer
 +
|-
 +
|FPD-Link III Operating Mode
 +
|CSI-2 Mode
 +
|-
 +
|Forward Channel Mode
 +
|Synchronous Mode
 +
|-
 +
|Back Channel Mode
 +
|Synchronous Mode
 +
|-
 +
|FPD-Link Line Rate
 +
|4.0 Gbps （Link with [[FPD-LINK3-2RX Data Sheet index|FPD-LINK3-2RX]]）
 +
|-
 +
|Back Channel Rate
 +
|50 Mbps （Link with [[FPD-LINK3-2RX Data Sheet index|FPD-LINK3-2RX]]）
 +
|-
 +
| colspan="2" |'''General'''
 +
|-
 +
|Operating Conditions
 +
('''Bare PCB''')
 +
|Operating guarantee temperature：'''-20℃~85℃''', Humidity 95% or less, non-condensing
 +
|-
 +
|POC DC Power Input
 +
|DC 9-15V （J2）
 +
|-
 +
|Dimension
 +
|38mm*38mm
 +
|}
 +
[[File:FPD-LINK3-TX 03 IF.jpg|alt=|thumb|600x600px|FPD-LINK3-TX Pin List]]
 +
[[File:FPD-LINK3-TX 04 IF.jpg|alt=|thumb|600x600px|FPD-LINK3-TX Pin List]]
 +
[[File:FPD LINK III-TX PIN.png|alt=|thumb|600x600px|FPD-LINK3-TX Pin]]
 +
 
 +
==Board Pinlist（接口和引脚说明）==
 +
{| class="wikitable"
 +
| colspan="3" |'''J1:'''
 +
'''Connect to CS-MIPI-SC132's J7'''
 +
 
 +
'''Connect to CS-MIPI-IMX307's J7'''
 
|-
 
|-
 
|'''<small>Pin NO.（引脚号）</small>'''
 
|'''<small>Pin NO.（引脚号）</small>'''
Line 30: Line 97:
 
|-
 
|-
 
|1
 
|1
−
|CAM_VSYNC
+
|MPIO0
−
|Internal Connect with J7-86 through a level shifter（3.3V to 1.8V）
+
|3.3V Level
 
|-
 
|-
 
|2
 
|2
−
|COM
+
|GND
−
|Internal pull up to 3.3V, Rpu=1.5KΩ
+
|
 
|-
 
|-
 
|3
 
|3
−
|Ext Trigger In
+
|MPIO1
−
|Internal Connect with J9-1
+
|3.3V Level
 
|}
 
|}
 
{| class="wikitable"
 
{| class="wikitable"
−
| colspan="3" |'''J9'''
+
| colspan="3" |'''J4'''
 
|-
 
|-
 
|'''<small>Pin NO.（引脚号）</small>'''
 
|'''<small>Pin NO.（引脚号）</small>'''
Line 49: Line 116:
 
|-
 
|-
 
|1
 
|1
−
|Ext Trigger In
+
|MPIO2
−
|Internal Connect with J8-3
+
|3.3V Level
 
|-
 
|-
 
|2
 
|2
Line 57: Line 124:
 
|-
 
|-
 
|3
 
|3
−
|<small>NC</small>
+
|MPIO3
−
|
+
|3.3V Level
 
|}
 
|}
 
{| class="wikitable"
 
{| class="wikitable"
−
| colspan="2" |'''J8,J9,SW1 Functional specifications（J8,J9,SW1功能说明）'''
+
| colspan="2" |'''J2'''：'''POC interface（POC接口）'''
−
|-
 
−
|'''<small>J8 Jumper Status（J8跳选状态）</small>'''
 
−
|<small>'''Remarks（说明）'''</small>
 
−
|-
 
−
|Short connection J8-1 and J8-2
 
−
（短接J8的1、2引脚）
 
−
|Select J7-86(CAM_VSYNC) as the trigger source，Only available Interconnect with TX2 platform
 
−
（与TX2平台主板互联时，此时选择的是J7-86（CAM_VSYNC）作为触发源）
 
 
|-
 
|-
−
| rowspan="2" |Short connection J8-2 and J8-3
+
|'''Connector（接插件）'''
−
（短接J8的2、3引脚）
+
|'''Interface Definition（接口定义）'''
−
|Select J9-1(Ext Trigger In) as the trigger source
 
−
（此时选择的是J9-1（Ext Trigger In）作为外触发源）
 
 
|-
 
|-
−
|SW1 is used for testing to simulate an external trigger signal，Internal Connect with J9-3
+
|FAKRA Z
−
（此时SW1模拟一个外触发信号，与J9-3引脚连接在一起）
+
|[[File:Polarity diagram.png|center|thumb|200x200px|alt=|'''+：POC signal  /  -：GND''']]
 
|}
 
|}
 
{| class="wikitable"
 
{| class="wikitable"
−
| colspan="13" |'''J1 / J2 / J3 / J4 / J5 / J6'''
+
| colspan="3" |'''J5 : Connect to CS-MIPI-IMX307's J8 （与CS-MIPI-IMX307 J8互联）'''
 
|-
 
|-
−
| rowspan="2" |'''<small>Pin NO.</small>'''
+
|'''<small>Pin NO.（引脚号）</small>'''
−
| colspan="2" |'''<small>J1</small>'''
+
|'''<small>NAME（名称）</small>'''
−
| colspan="2" |'''<small>J2</small>'''
+
|'''<small>Remarks（说明）</small>'''
−
| colspan="2" |'''<small>J3</small>'''
 
−
| colspan="2" |'''<small>J4</small>'''
 
−
| colspan="2" |'''<small>J5</small>'''
 
−
| colspan="2" |'''<small>J6</small>'''
 
 
|-
 
|-
−
|'''<small>NAME</small>'''
+
|1
−
|'''<small>Remarks</small>'''
+
|GND
−
|'''<small>NAME</small>'''
 
−
|'''<small>Remarks</small>'''
 
−
|'''<small>NAME</small>'''
 
−
|'''<small>Remarks</small>'''
 
−
|'''<small>NAME</small>'''
 
−
|'''<small>Remarks</small>'''
 
−
|'''<small>NAME</small>'''
 
−
|'''<small>Remarks</small>'''
 
−
|'''<small>NAME</small>'''
 
−
|'''<small>Remarks</small>'''
 
−
|-
 
−
|<small>1</small>
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>2</small>
+
|2
−
|<small>NC</small>
+
|MIPI_L0_N
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>3</small>
+
|3
−
|<small>NC</small>
+
|MIPI_L0_P
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>4</small>
+
|4
−
|<small>GND</small>
+
|GND
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>5</small>
+
|5
−
|<small>NC</small>
+
|MIPI_L1_N
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>6</small>
+
|6
−
|<small>NC</small>
+
|MIPI_L1_P
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>7</small>
+
|7
−
|<small>GND</small>
+
|GND
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>8</small>
+
|8
−
|<small>CSI_A_CLK_P</small>
+
|MIPI_CK_N
−
|
 
−
|<small>CSI_B_CLK_P</small>
 
−
|
 
−
|<small>CSI_C_CLK_P</small>
 
−
|
 
−
|<small>CSI_D_CLK_P</small>
 
−
|
 
−
|<small>CSI_E_CLK_P</small>
 
−
|
 
−
|<small>CSI_F_CLK_P</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>9</small>
+
|9
−
|<small>CSI_A_CLK_N</small>
+
|MIPI_CK_P
−
|
 
−
|<small>CSI_B_CLK_N</small>
 
−
|
 
−
|<small>CSI_C_CLK_N</small>
 
−
|
 
−
|<small>CSI_D_CLK_N</small>
 
−
|
 
−
|<small>CSI_E_CLK_N</small>
 
−
|
 
−
|<small>CSI_F_CLK_N</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>10</small>
+
|10
−
|<small>GND</small>
+
|GND
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>11</small>
+
|11
−
|<small>CSI_A_D1_P</small>
+
|RESERVE
−
|
+
|NC
−
|<small>CSI_B_D1_P</small>
 
−
|
 
−
|<small>CSI_C_D1_P</small>
 
−
|
 
−
|<small>CSI_D_D1_P</small>
 
−
|
 
−
|<small>CSI_E_D1_P</small>
 
−
|
 
−
|<small>CSI_F_D1_P</small>
 
−
|
 
 
|-
 
|-
−
|<small>12</small>
+
|12
−
|<small>CSI_A_D1_N</small>
+
|RESERVE
−
|
+
|NC
−
|<small>CSI_B_D1_N</small>
 
−
|
 
−
|<small>CSI_C_D1_N</small>
 
−
|
 
−
|<small>CSI_D_D1_N</small>
 
−
|
 
−
|<small>CSI_E_D1_N</small>
 
−
|
 
−
|<small>CSI_F_D1_N</small>
 
−
|
 
 
|-
 
|-
−
|<small>13</small>
+
|13
−
|<small>GND</small>
+
|SCL
−
|
+
|3.3V Level
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
 
|-
 
|-
−
|<small>14</small>
+
|14
−
|<small>CSI_A_D0_P</small>
+
|SDA
−
|
+
|3.3V Level
−
|<small>CSI_B_D0_P</small>
 
−
|
 
−
|<small>CSI_C_D0_P</small>
 
−
|
 
−
|<small>CSI_D_D0_P</small>
 
−
|
 
−
|<small>CSI_E_D0_P</small>
 
−
|
 
−
|<small>CSI_F_D0_P</small>
 
−
|
 
 
|-
 
|-
−
|<small>15</small>
+
|15
−
|<small>CSI_A_D0_N</small>
+
|VCC3V3
−
|
+
|PWR OUT
−
|<small>CSI_B_D0_N</small>
+
|}
−
|
+
{| class="wikitable"
−
|<small>CSI_C_D0_N</small>
+
| colspan="6" |'''J6：Connect to VEYE-MIPI-327's J5 （与VEYE-MIPI-327 J5互联）'''
−
|
 
−
|<small>CSI_D_D0_N</small>
 
−
|
 
−
|<small>CSI_E_D0_N</small>
 
−
|
 
−
|<small>CSI_F_D0_N</small>
 
−
|
 
 
|-
 
|-
−
|<small>16</small>
+
|'''<small>Pin NO.（引脚号）</small>'''
−
|<small>GND</small>
+
|'''<small>NAME（名称）</small>'''
−
|
+
|'''<small>Remarks（说明）</small>'''
−
|<small>GND</small>
+
|'''<small>Pin NO.（引脚号）</small>'''
−
|
+
|'''<small>NAME（名称）</small>'''
−
|<small>GND</small>
+
|'''<small>Remarks（说明）</small>'''
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
−
|<small>GND</small>
 
−
|
 
 
|-
 
|-
−
|<small>17</small>
+
|1
−
|<small>NC</small>
+
|VCC3V3
−
|
+
|PWR OUT
−
|<small>NC</small>
+
|2
−
|
+
|VCC3V3
−
|<small>NC</small>
+
|PWR OUT
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
−
|
 
−
|<small>NC</small>
 
−
|
 
 
|-
 
|-
−
|<small>18</small>
+
|3
−
|<small>RESERVE</small>
+
| VCC3V3
−
|<small>NC</small>
+
|PWR OUT
−
|<small>RESERVE</small>
+
|4
−
|<small>NC</small>
+
|VCC3V3
−
|<small>RESERVE</small>
+
|PWR OUT
−
|<small>NC</small>
 
−
|<small>RESERVE</small>
 
−
|<small>NC</small>
 
−
|<small>RESERVE</small>
 
−
|<small>NC</small>
 
−
|<small>RESERVE</small>
 
−
|<small>NC</small>
 
 
|-
 
|-
−
|<small>19</small>
+
|5
−
|<small>GND</small>
+
|GND
 
|
 
|
−
|<small>GND</small>
+
| 6
 +
| GND
 
|
 
|
−
|<small>GND</small>
+
|-
 +
| 7
 +
|GND
 
|
 
|
−
|<small>GND</small>
+
|8
 +
|GND
 
|
 
|
−
|<small>GND</small>
+
|-
 +
|9
 +
|MIPI_L0_N
 
|
 
|
−
|<small>GND</small>
+
|10
 +
|NC
 
|
 
|
 
|-
 
|-
−
|<small>20</small>
+
|11
−
|<small>SCL0</small>
+
|MIPI_L0_P
−
|<small>3.3V Level</small>
 
−
|<small>SCL1</small>
 
−
|<small>3.3V Level</small>
 
−
|<small>SCL2</small>
 
−
|<small>3.3V Level</small>
 
−
|<small>SCL3</small>
 
−
|<small>3.3V Level</small>
 
−
|<small>SCL4</small>
 
−
|<small>3.3V Level</small>
 
−
|<small>SCL5</small>
 
−
|<small>3.3V Level</small>
 
−
|-
 
−
|<small>21</small>
 
−
|<small>SDA0</small>
 
−
|<small>3.3V Level</small>
 
−
|<small>SDA1</small>
 
−
|<small>3.3V Level</small>
 
−
|<small>SDA2</small>
 
−
|<small>3.3V Level</small>
 
−
|<small>SDA3</small>
 
−
|<small>3.3V Level</small>
 
−
|<small>SDA4</small>
 
−
|<small>3.3V Level</small>
 
−
|<small>SDA5</small>
 
−
|<small>3.3V Level</small>
 
−
|-
 
−
|<small>22</small>
 
−
|<small>GND</small>
 
 
|
 
|
−
|<small>GND</small>
+
|12
 +
|NC
 
|
 
|
−
|<small>GND</small>
+
|-
 +
|13
 +
|GND
 
|
 
|
−
|<small>GND</small>
+
|14
 +
|NC
 
|
 
|
−
|<small>GND</small>
+
|-
 +
|15
 +
|MIPI_L1_N
 
|
 
|
−
|<small>GND</small>
+
|16
 +
|NC
 
|
 
|
 
|-
 
|-
−
|<small>23</small>
+
|17
−
|<small>Sync0</small>
+
|MIPI_L1_P
 
|
 
|
−
|<small>Sync0</small>
+
|18
 +
|NC
 
|
 
|
−
|<small>Sync0</small>
+
|-
 +
|19
 +
|GND
 
|
 
|
−
|<small>Sync0</small>
+
|20
 +
|NC
 
|
 
|
−
|<small>Sync0</small>
+
|-
 +
|21
 +
|MIPI_CK_N
 
|
 
|
−
|<small>Sync0</small>
+
|22
 +
|SDA
 +
|3.3V LEVEL
 +
|-
 +
|23
 +
|MIPI_CK_P
 
|
 
|
 +
|24
 +
|SCL
 +
|3.3V LEVEL
 
|-
 
|-
−
|<small>24</small>
+
|25
−
|<small>Sync1</small>
+
|GND
 
|
 
|
−
|<small>Sync1</small>
+
|26
 +
|GND
 
|
 
|
−
|<small>Sync1</small>
+
|-
 +
|27
 +
|NC
 
|
 
|
−
|<small>Sync1</small>
+
|28
 +
|NC
 
|
 
|
−
|<small>Sync1</small>
+
|-
 +
|29
 +
|NC
 
|
 
|
−
|<small>Sync1</small>
+
|30
 +
|NC
 
|
 
|
 
|-
 
|-
−
|<small>25</small>
+
|31
−
|<small>VDD_3V3_SLP</small>
+
|GND
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|-
 
−
|<small>26</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|-
 
−
|<small>27</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR OUT</small>
 
−
|-
 
−
|<small>28</small>
 
−
|<small>GND</small>
 
 
|
 
|
−
|<small>GND</small>
+
|32
 +
|GND
 
|
 
|
−
|<small>GND</small>
+
|-
 +
|33
 +
|NC
 
|
 
|
−
|<small>GND</small>
+
|34
 +
|NC
 
|
 
|
−
|<small>GND</small>
+
|-
 +
|35
 +
|NC
 
|
 
|
−
|<small>GND</small>
+
|36
 +
|NC
 
|
 
|
−
|}<br />
 
−
{| class="wikitable"
 
−
| colspan="12" |'''J7'''
 
 
|-
 
|-
−
|'''<small>Pin NO.</small>'''
+
|37
−
|'''<small>NAME</small>'''
+
|GND
−
|'''<small>Remarks</small>'''
 
−
|'''<small>Pin NO.</small>'''
 
−
|'''<small>NAME</small>'''
 
−
|'''<small>Remarks</small>'''
 
−
|'''<small>Pin NO.</small>'''
 
−
|'''<small>NAME</small>'''
 
−
|'''<small>Remarks</small>'''
 
−
|'''<small>Pin NO.</small>'''
 
−
|'''<small>NAME</small>'''
 
−
|'''<small>Remarks</small>'''
 
−
|-
 
−
|<small>1</small>
 
−
|<small>CSI_A_D0_P</small>
 
 
|
 
|
−
|<small>31</small>
+
|38
−
|<small>CSI_C_D1_P</small>
+
|NC
 
|
 
|
−
|<small>61</small>
+
|-
−
|<small>NC</small>
+
|39
 +
|NC
 
|
 
|
−
|<small>91</small>
+
|40
−
|<small>NC</small>
+
|NC
 
|
 
|
 +
|}
 +
{| class="wikitable"
 +
| colspan="3" |'''J3: RESERVE （预留）'''
 
|-
 
|-
−
|<small>2</small>
+
|'''<small>Pin NO.（引脚号）</small>'''
−
|<small>CSI_B_D0_P</small>
+
|'''<small>NAME（名称）</small>'''
−
|
+
|'''<small>Remarks（说明）</small>'''
−
|<small>32</small>
 
−
|<small>CSI_D_D1_P</small>
 
−
|
 
−
|<small>62</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>92</small>
 
−
|<small>NC</small>
 
−
|
 
 
|-
 
|-
−
|<small>3</small>
+
|1
−
|<small>CSI_A_D0_N</small>
+
|GND
−
|
 
−
|<small>33</small>
 
−
|<small>CSI_C_D1_N</small>
 
−
|
 
−
|<small>63</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>93</small>
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>4</small>
+
|2
−
|<small>CSI_B_D0_N</small>
+
|VCC3V3
−
|
+
|PWR OUT
−
|<small>34</small>
 
−
|<small>CSI_D_D1_N</small>
 
−
|
 
−
|<small>64</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>94</small>
 
−
|<small>NC</small>
 
−
|
 
 
|-
 
|-
−
|<small>5</small>
+
|3
−
|<small>GND</small>
+
|VCC3V3
−
|
+
|PWR OUT
−
|<small>35</small>
 
−
|<small>GND</small>
 
−
|
 
−
|<small>65</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>95</small>
 
−
|<small>NC</small>
 
−
|
 
 
|-
 
|-
−
|<small>6</small>
+
|4
−
|<small>GND</small>
+
|VCC3V3
−
|
+
|PWR OUT
−
|<small>36</small>
 
−
|<small>GND</small>
 
−
|
 
−
|<small>66</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>96</small>
 
−
|<small>NC</small>
 
−
|
 
 
|-
 
|-
−
|<small>7</small>
+
|5
−
|<small>CSI_A_CLK_P</small>
+
|MPIO3
−
|
 
−
|<small>37</small>
 
−
|<small>CSI_E_D0_P</small>
 
−
|
 
−
|<small>67</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>97</small>
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>8</small>
+
|6
−
|<small>CSI_B_CLK_P</small>
+
|MPIO2
−
|
 
−
|<small>38</small>
 
−
|<small>CSI_F_D0_P</small>
 
−
|
 
−
|<small>68</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>98</small>
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>9</small>
+
|7
−
|<small>CSI_A_CLK_N</small>
+
|GND
−
|
 
−
|<small>39</small>
 
−
|<small>CSI_E_D0_N</small>
 
−
|
 
−
|<small>69</small>
 
−
|<small>GND</small>
 
−
|
 
−
|<small>99</small>
 
−
|<small>GND</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>10</small>
+
|8
−
|<small>CSI_B_CLK_N</small>
+
|SDA
−
|
+
|3.3V LEVEL
−
|<small>40</small>
 
−
|<small>CSI_F_D0_N</small>
 
−
|
 
−
|<small>70</small>
 
−
|<small>GND</small>
 
−
|
 
−
|<small>100</small>
 
−
|<small>GND</small>
 
−
|
 
 
|-
 
|-
−
|<small>11</small>
+
|9
−
|<small>GND</small>
+
|SCL
−
|
+
|3.3V LEVEL
−
|<small>41</small>
 
−
|<small>GND</small>
 
−
|
 
−
|<small>71</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>101</small>
 
−
|<small>NC</small>
 
−
|
 
 
|-
 
|-
−
|<small>12</small>
+
|10
−
|<small>GND</small>
+
|GND
−
|
 
−
|<small>42</small>
 
−
|<small>GND</small>
 
−
|
 
−
|<small>72</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>102</small>
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>13</small>
+
|11
−
|<small>CSI_A_D1_P</small>
+
|MPIO1
−
|
+
|3.3V Level
−
|<small>43</small>
 
−
|<small>CSI_E_CLK_P</small>
 
−
|
 
−
|<small>73</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>103</small>
 
−
|<small>NC</small>
 
−
|
 
 
|-
 
|-
−
|<small>14</small>
+
|12
−
|<small>CSI_B_D1_P</small>
+
|MPIO0
−
|
+
|3.3V Level
−
|<small>44</small>
 
−
|<small>CSI_F_CLK_P</small>
 
−
|
 
−
|<small>74</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>104</small>
 
−
|<small>NC</small>
 
−
|
 
 
|-
 
|-
−
|<small>15</small>
+
|13
−
|<small>CSI_A_D1_N</small>
+
|GND
−
|
 
−
|<small>45</small>
 
−
|<small>CSI_E_CLK_N</small>
 
−
|
 
−
|<small>75</small>
 
−
|<small>CAM_I2C_SCL</small>
 
−
|<small>1.8V Level</small>
 
−
|<small>105</small>
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>16</small>
+
|14
−
|<small>CSI_B_D1_N</small>
+
|MIPI_L0_N
−
|
 
−
|<small>46</small>
 
−
|<small>CSI_F_CLK_N</small>
 
−
|
 
−
|<small>76</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>106</small>
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>17</small>
+
|15
−
|<small>GND</small>
+
|MIPI_L0_P
−
|
 
−
|<small>47</small>
 
−
|<small>GND</small>
 
−
|
 
−
|<small>77</small>
 
−
|<small>CAM_I2C_SDA</small>
 
−
|<small>1.8V Level</small>
 
−
|<small>107</small>
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>18</small>
+
|16
−
|<small>GND</small>
+
|GND
−
|
 
−
|<small>48</small>
 
−
|<small>GND</small>
 
 
|
 
|
−
|<small>78</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>108</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR</small>
 
 
|-
 
|-
−
|<small>19</small>
+
|17
−
|<small>CSI_C_D0_P</small>
+
|MIPI_L1_N
 
|
 
|
−
|<small>49</small>
 
−
|<small>CSI_E_D1_P</small>
 
−
|
 
−
|<small>79</small>
 
−
|<small>GND</small>
 
−
|
 
−
|<small>109</small>
 
−
|<small>VDD_5V0_IO_SYS</small>
 
−
|<small>PWR</small>
 
 
|-
 
|-
−
|<small>20</small>
+
|18
−
|<small>CSI_D_D0_P</small>
+
|MIPI_L1_P
 
|
 
|
−
|<small>50</small>
 
−
|<small>CSI_F_D1_P</small>
 
−
|
 
−
|<small>80</small>
 
−
|<small>GND</small>
 
−
|
 
−
|<small>110</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR</small>
 
 
|-
 
|-
−
|<small>21</small>
+
|19
−
|<small>CSI_C_D0_N</small>
+
|GND
−
|
 
−
|<small>51</small>
 
−
|<small>CSI_E_D1_N</small>
 
−
|
 
−
|<small>81</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>111</small>
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>22</small>
+
|20
−
|<small>CSI_D_D0_N</small>
+
|MIPI_CK_N
−
|
 
−
|<small>52</small>
 
−
|<small>CSI_F_D1_N</small>
 
−
|
 
−
|<small>82</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>112</small>
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>23</small>
+
|21
−
|<small>GND</small>
+
|MIPI_CK_P
−
|
 
−
|<small>53</small>
 
−
|<small>GND</small>
 
−
|
 
−
|<small>83</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>113</small>
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>24</small>
+
|22
−
|<small>GND</small>
+
|GND
−
|
 
−
|<small>54</small>
 
−
|<small>GND</small>
 
−
|
 
−
|<small>84</small>
 
−
|<small>VDD_3V3_SLP</small>
 
−
|<small>PWR</small>
 
−
|<small>114</small>
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>25</small>
+
|23
−
|<small>CSI_C_CLK_P</small>
+
|MIPI_L2_N
−
|
 
−
|<small>55</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>85</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>115</small>
 
−
|<small>GND</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>26</small>
+
|24
−
|<small>CSI_D_CLK_P</small>
+
|MIPI_L2_P
−
|
 
−
|<small>56</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>86</small>
 
−
|<small>CAM_VSYNC</small>
 
−
|<small>RESERVE</small>
 
−
|<small>116</small>
 
−
|<small>GND</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>27</small>
+
|25
−
|<small>CSI_C_CLK_N</small>
+
|GND
−
|
 
−
|<small>57</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>87</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>117</small>
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>28</small>
+
|26
−
|<small>CSI_D_CLK_N</small>
+
|MIPI_L3_N
 
|
 
|
−
|<small>58</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>88</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>118</small>
 
−
|<small>VDD_5V0_IO_SYS</small>
 
−
|<small>PWR</small>
 
 
|-
 
|-
−
|<small>29</small>
+
|27
−
|<small>GND</small>
+
|MIPI_L3_P
−
|
 
−
|<small>59</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>89</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>119</small>
 
−
|<small>NC</small>
 
 
|
 
|
 
|-
 
|-
−
|<small>30</small>
+
|28
−
|<small>GND</small>
+
|GND
−
|
 
−
|<small>60</small>
 
−
|<small>NC</small>
 
−
|
 
−
|<small>90</small>
 
−
|<small>NC</small>
 
 
|
 
|
−
|<small>120</small>
 
−
|<small>VDD_5V0_IO_SYS</small>
 
−
|<small>PWR</small>
 
 
|}
 
|}
  
−
==Adapter Board Dimension（板子尺寸）==
+
==Board Dimension（板子尺寸）==
−
[[File:ADP-N1-CAD2.jpg|alt=|thumb|600x600px|ADP-N1 CAD / unit:mm|none]][[Media:ADP-N1 DXF.zip|Download dwg file here]]
+
[[File:FPDLINK3-TX JPG DWG.jpg|alt=|none|thumb|600x600px|FPD-LINK3-TX CAD / unit:mm]]
−
__FORCETOC__
+
[[Media:FPDLINK3-TX DWG.dwg|Download dwg file here]]
 +
== PCBA 3D STP File ==
 +
[[Media:3D FPD-LINK3-TX.zip|download 3D STP file]]

Latest revision as of 11:22, 9 October 2022

FPD-LINK3-TX Data Sheet （FPD-LINK3-TX数据手册）

1 Product Picture（产品图片）

PART NUMBER / 型号 FRONT VIEW / 正面图片 BACK VIEW / 背面图片
FPD-LINK3-TX

2 Thechnical Detail (技术规格)

Thechnical Detail (技术规格)
2 MP MIPI® CSI-2 FPD-Link III serializer
IC PART NO. DS90UB953-Q1 / TSER953RHBT
Function Serializer
Input Compatibility MIPI CSI-2
Output Compatibility FPD-Link III LVDS / V3Link SerDes
Interface
MIPI INPUT MIPI CSI-2 2lane (800Mbsp/lane max), J5 J6 Support

MIPI CSI-2 4lane (800Mbsp/lane max), J3 Support

MIPI INPUT Connector FFC socket（J3 J5），B2B Connector（J6）
LVDS OUTPUT FPD-Link III LVDS (4Gbps data rate)
LVDS OUTPUT Connector FAKRA Z Compatibility
MPIO Up to 4 Multi-function IO
Device Functional Modes
Clocking Mode Synchronous Mode， FPD-Link III Clock reference derived from deserializer
FPD-Link III Operating Mode CSI-2 Mode
Forward Channel Mode Synchronous Mode
Back Channel Mode Synchronous Mode
FPD-Link Line Rate 4.0 Gbps （Link with FPD-LINK3-2RX）
Back Channel Rate 50 Mbps （Link with FPD-LINK3-2RX）
General
Operating Conditions

(Bare PCB)

Operating guarantee temperature：-20℃~85℃, Humidity 95% or less, non-condensing
POC DC Power Input DC 9-15V （J2）
Dimension 38mm*38mm
FPD-LINK3-TX Pin List
FPD-LINK3-TX Pin List
FPD-LINK3-TX Pin

3 Board Pinlist（接口和引脚说明）

J1:

Connect to CS-MIPI-SC132's J7

Connect to CS-MIPI-IMX307's J7

Pin NO.（引脚号） NAME（名称） Remarks（说明）
1 MPIO0 3.3V Level
2 GND
3 MPIO1 3.3V Level
J4
Pin NO.（引脚号） NAME（名称） Remarks（说明）
1 MPIO2 3.3V Level
2 GND
3 MPIO3 3.3V Level
J2：POC interface（POC接口）
Connector（接插件） Interface Definition（接口定义）
FAKRA Z
+：POC signal / -：GND
J5 : Connect to CS-MIPI-IMX307's J8 （与CS-MIPI-IMX307 J8互联）
Pin NO.（引脚号） NAME（名称） Remarks（说明）
1 GND
2 MIPI_L0_N
3 MIPI_L0_P
4 GND
5 MIPI_L1_N
6 MIPI_L1_P
7 GND
8 MIPI_CK_N
9 MIPI_CK_P
10 GND
11 RESERVE NC
12 RESERVE NC
13 SCL 3.3V Level
14 SDA 3.3V Level
15 VCC3V3 PWR OUT
J6：Connect to VEYE-MIPI-327's J5 （与VEYE-MIPI-327 J5互联）
Pin NO.（引脚号） NAME（名称） Remarks（说明） Pin NO.（引脚号） NAME（名称） Remarks（说明）
1 VCC3V3 PWR OUT 2 VCC3V3 PWR OUT
3 VCC3V3 PWR OUT 4 VCC3V3 PWR OUT
5 GND 6 GND
7 GND 8 GND
9 MIPI_L0_N 10 NC
11 MIPI_L0_P 12 NC
13 GND 14 NC
15 MIPI_L1_N 16 NC
17 MIPI_L1_P 18 NC
19 GND 20 NC
21 MIPI_CK_N 22 SDA 3.3V LEVEL
23 MIPI_CK_P 24 SCL 3.3V LEVEL
25 GND 26 GND
27 NC 28 NC
29 NC 30 NC
31 GND 32 GND
33 NC 34 NC
35 NC 36 NC
37 GND 38 NC
39 NC 40 NC
J3: RESERVE （预留）
Pin NO.（引脚号） NAME（名称） Remarks（说明）
1 GND
2 VCC3V3 PWR OUT
3 VCC3V3 PWR OUT
4 VCC3V3 PWR OUT
5 MPIO3
6 MPIO2
7 GND
8 SDA 3.3V LEVEL
9 SCL 3.3V LEVEL
10 GND
11 MPIO1 3.3V Level
12 MPIO0 3.3V Level
13 GND
14 MIPI_L0_N
15 MIPI_L0_P
16 GND
17 MIPI_L1_N
18 MIPI_L1_P
19 GND
20 MIPI_CK_N
21 MIPI_CK_P
22 GND
23 MIPI_L2_N
24 MIPI_L2_P
25 GND
26 MIPI_L3_N
27 MIPI_L3_P
28 GND

4 Board Dimension（板子尺寸）

FPD-LINK3-TX CAD / unit:mm

Download dwg file here

5 PCBA 3D STP File

download 3D STP file

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