Difference between revisions of "VEYE-LVDS-290/327"
Jump to navigation
Jump to search
Line 101: | Line 101: | ||
|} | |} | ||
[[File:VEYE-MIPI-290-327接口图.jpg|thumb|VEYE-LVDS-290/327 User Interface]] | [[File:VEYE-MIPI-290-327接口图.jpg|thumb|VEYE-LVDS-290/327 User Interface]] | ||
− | [[File:VEYE-MIPI-290-327 CAD drawing.jpg|thumb|VEYE- | + | [[File:VEYE-MIPI-290-327 CAD drawing.jpg|thumb|VEYE-LVDS-290/327 CAD drawing|alt=]] |
===Diagram, Layout and Dimension=== | ===Diagram, Layout and Dimension=== |
Revision as of 11:26, 10 December 2019
1 Introduction
VEYE-LVDS-290/327 is a camera module designed by Tianjin Zhongan Yijia technology co., LTD., with excellent low illumination and wide dynamic performance.This module only has 38*38*8mm, which is convenient for integration and can be connected to various embedded motherboards with adapter board.Suitable for machine vision, intelligent analysis, industrial control, face recognition, ADAS etc...
2 Thechnical Detail
Technical Details | |
SENSOR | |
Sensor | SONY IMX290LQR-C/IMX327LQR-C STARVIS |
Pixels | 2.07M pixels |
Resolution | 1920*1080 |
Image Size | Diagonal 6.46 mm (Type 1/2.8) |
Unit Cell Size | 2.9um (H)*2.9um(V) |
ISP | |
Frame Rate | 1080p@25 / 1080p@30fps |
Exposure | Auto or Manual |
White Balance | Auto or Manual |
Shutter | 1/25(1/30)s to 1/50,000s |
Slow Shutter | Support |
Denoising | 2D/3D noise reduction |
Image Setting | Brightness, Contrast, Sharpness, Saturation,Flip, Mirror |
Image Enhancement | BLC, DOL-WDR, Defog |
Day/Night Switch | Manual or IR-CUT filter with external trigger |
Lens & IR-CUT | |
Lens | Support M12*0.5 or M16*0.5 depend on lens mount |
Lens Mount with IR-CUT | MTV12 or MTV16 |
Mounting Hole | 2 screw holes with diameter of 2.2mm,20mm Center-to-Center Spacing |
Interface | |
PCB Connector | BTB connector:BTB050040-F1D |
Communication Interface | IIC, 3.3VDC |
Video Data Interface | LVDS:3 Data Lanes, bandwidth:1.5582Gbps |
IR-CUT Control | IR-CUT motor control, 3.3VDC |
Day/Night External Trigger | 3.3VDC to 12VDC compatibility |
General | |
Operating Conditions | -10℃-50℃, Humidity 95% or less, non-condensing |
Power Supply | 3.3VDC |
Power Consumption | 3.3VDC,1.2W |
Dimension | 38mm*38mm*8mm(not include lens and lens mount) |
3 Diagram, Layout and Dimension
- J5 pin list
1 | RESERVE, Not Connected | 2 | RESERVE, Not Connected |
3 | GND | 4 | RESERVE, Not Connected |
5 | RESERVE, Not Connected | 6 | RESERVE, Not Connected |
7 | RESERVE, Not Connected | 8 | RESERVE, Not Connected |
9 | GND | 10 | GND |
11 | LVDS_L2_P | 12 | RESERVE, Not Connected |
13 | LVDS_L2_N | 14 | RESERVE, Not Connected |
15 | GND | 16 | GND |
17 | LVDS_CK_P | 18 | SCL_3.3V |
19 | LVDS_CK_N | 20 | SDA_3.3V |
21 | GND | 22 | RESERVE, Not Connected |
23 | LVDS_L1_P | 24 | RESERVE, Not Connected |
25 | LVDS_L1_N | 26 | RESERVE, Not Connected |
27 | GND | 28 | RESERVE, Not Connected |
29 | LVDS_L0_P | 30 | RESERVE, Not Connected |
31 | LVDS_L0_N | 32 | RESERVE, Not Connected |
33 | GND | 34 | GND |
35 | GND | 36 | GND |
37 | VCC3V3 | 38 | VCC3V3 |
39 | VCC3V3 | 40 | VCC3V3 |
- J3 pin list
1 | Day&Night Signal In |
2 | GND |
3 | NC |
- J4 pin list
1 | IRCUT1 |
2 | IRCUT2 |
4 Imaging Effect
5 CPU boards
- Demo for FPGA usage
We provide a demo for FPGA usage,check link here.