Difference between revisions of "Adapter Board for Rockchip"
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'''<big>Adapter Board for Rockchip Description</big>''' | '''<big>Adapter Board for Rockchip Description</big>''' | ||
− | === Introduction === | + | ===Introduction=== |
+ | |||
+ | ===Adapter Board Diagram, Layout=== | ||
+ | |||
+ | * J2 pin list | ||
− | |||
{| class="wikitable" | {| class="wikitable" | ||
|+ | |+ | ||
Line 66: | Line 69: | ||
|GND | |GND | ||
|24 | |24 | ||
− | | | + | |RESERVE, Not Connected |
|- | |- | ||
|25 | |25 | ||
Line 74: | Line 77: | ||
|- | |- | ||
|27 | |27 | ||
− | | | + | |RESERVE, Not Connected |
|28 | |28 | ||
− | | | + | |RESERVE, Not Connected |
|- | |- | ||
|29 | |29 | ||
− | | | + | |RESERVE, Not Connected |
|30 | |30 | ||
− | | | + | |RESERVE, Not Connected |
|} | |} | ||
+ | |||
+ | * J3 pin list | ||
+ | |||
{| class="wikitable" | {| class="wikitable" | ||
|+ | |+ | ||
Line 141: | Line 147: | ||
|- | |- | ||
|23 | |23 | ||
− | | | + | |RESERVE, Not Connected |
|24 | |24 | ||
− | | | + | |RESERVE, Not Connected |
|- | |- | ||
|25 | |25 | ||
− | | | + | |RESERVE, Not Connected |
|26 | |26 | ||
− | | | + | |RESERVE, Not Connected |
|- | |- | ||
|27 | |27 | ||
− | | | + | |RESERVE, Not Connected |
|28 | |28 | ||
|GND | |GND | ||
Line 160: | Line 166: | ||
|VCC5V | |VCC5V | ||
|} | |} | ||
+ | |||
+ | * J4 pin list | ||
+ | |||
{| class="wikitable" | {| class="wikitable" | ||
|+ | |+ |
Revision as of 11:43, 25 July 2019
Adapter Board for Rockchip Description
1 Introduction
2 Adapter Board Diagram, Layout
- J2 pin list
1 | GND | 2 | MIPI_L0_N |
3 | MIPI_L0_P | 4 | GND |
5 | MIPI_CK_N | 6 | MIPI_CK_P |
7 | GND | 8 | MIPI_L1_N |
9 | MIPI_L1_P | 10 | GND |
11 | MIPI_L2_N | 12 | MIPI_L2_P |
13 | GND | 14 | MIPI_L3_N |
15 | MIPI_L3_P | 16 | GND |
17 | MIPI_MCLK0 | 18 | GND |
19 | GPIOx | 20 | MIPI_RST |
21 | MIPI_SCL_1V8 | 22 | MIPI_SDA_1V8 |
23 | GND | 24 | RESERVE, Not Connected |
25 | GND | 26 | VCC5V |
27 | RESERVE, Not Connected | 28 | RESERVE, Not Connected |
29 | RESERVE, Not Connected | 30 | RESERVE, Not Connected |
- J3 pin list
1 | GND | 2 | MIPI_L0_N |
3 | MIPI_L0_P | 4 | GND |
5 | MIPI_CK_N | 6 | MIPI_CK_P |
7 | GND | 8 | MIPI_L1_N |
9 | MIPI_L1_P | 10 | GND |
11 | MIPI_L2_N | 12 | MIPI_L2_P |
13 | GND | 14 | MIPI_L3_N |
15 | MIPI_L3_P | 16 | GND |
17 | MIPI_MCLK0 | 18 | GND |
19 | GPIOx | 20 | MIPI_RST |
21 | MIPI_SDA_1V8 | 22 | MIPI_SCL_1V8 |
23 | RESERVE, Not Connected | 24 | RESERVE, Not Connected |
25 | RESERVE, Not Connected | 26 | RESERVE, Not Connected |
27 | RESERVE, Not Connected | 28 | GND |
29 | GND | 30 | VCC5V |
- J4 pin list
1 | MIPI_L0_N | 2 | MIPI_L0_P |
3 | GND | 4 | MIPI_L1_N |
5 | MIPI_L1_P | 6 | GND |
7 | MIPI_CK_N | 8 | MIPI_CK_P |
9 | GND | 10 | MIPI_L2_N |
11 | MIPI_L2_P | 12 | GND |
13 | MIPI_L3_N | 14 | MIPI_L3_P |
15 | GND | 16 | MIPI_MCLK0 |
17 | GND | 18 | GPIOx |
19 | MIPI_RST | 20 | MIPI_SCL_1V8 |
21 | MIPI_SDA_1V8 | 22 | MIPI_PWR |
23 | CIF_PWR | 24 | VCC5V |