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Adapter Board for Rockchip (view source)

Revision as of 11:36, 16 April 2020

49 bytes added ,  11:36, 16 April 2020
→‎Adapter Board Diagram, Layout
Line 10: Line 10:  
Connect J3 interface and CSI-2 interface on NanoPi with 0.5mm 30 pin pitch FFC cable(TypeA)[[File:VEYENanoPi&Firefly Adapter ROCK.jpg|thumb|483x483px|connector position（front）]][[File:VEYENanoPi&Firefly Adapter B .jpg|thumb|485x485px|connector position（back)]]
 
Connect J3 interface and CSI-2 interface on NanoPi with 0.5mm 30 pin pitch FFC cable(TypeA)[[File:VEYENanoPi&Firefly Adapter ROCK.jpg|thumb|483x483px|connector position（front）]][[File:VEYENanoPi&Firefly Adapter B .jpg|thumb|485x485px|connector position（back)]]
 
===Adapter Board Diagram, Layout===
 
===Adapter Board Diagram, Layout===
−
  −
*J2 pin list
      
{| class="wikitable"
 
{| class="wikitable"
 +
| colspan="3" |'''J2'''
 +
|-
 +
|'''Pin NO.'''
 +
|'''NAME'''
 +
|'''Remarks'''
 +
|-
 
|1
 
|1
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|2
 
|2
 
|MIPI_L0_N
 
|MIPI_L0_N
 +
|
 
|-
 
|-
 
|3
 
|3
 
|MIPI_L0_P
 
|MIPI_L0_P
 +
|
 
|-
 
|-
 
|4
 
|4
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|5
 
|5
 
|MIPI_CK_N
 
|MIPI_CK_N
 +
|
 
|-
 
|-
 
|6
 
|6
 
|MIPI_CK_P
 
|MIPI_CK_P
 +
|
 
|-
 
|-
 
|7
 
|7
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|8
 
|8
 
|MIPI_L1_1
 
|MIPI_L1_1
 +
|
 
|-
 
|-
 
|9
 
|9
 
|MIPI_L1_P
 
|MIPI_L1_P
 +
|
 
|-
 
|-
 
|10
 
|10
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|11
 
|11
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|12
 
|12
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|13
 
|13
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|14
 
|14
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|15
 
|15
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|16
 
|16
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|17
 
|17
 
|MIPI_MCLK0
 
|MIPI_MCLK0
 +
|
 
|-
 
|-
 
|18
 
|18
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|19
 
|19
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|20
 
|20
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|21
 
|21
−
|SCL_1.8V
+
|SCL
 +
|1.8V Level
 
|-
 
|-
 
|22
 
|22
−
|SDA_1.8V
+
|SDA
 +
|1.8V Level
 
|-
 
|-
 
|23
 
|23
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|24
 
|24
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|25
 
|25
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|26
 
|26
 
|VCC5V
 
|VCC5V
 +
|PWR IN
 
|-
 
|-
 
|27
 
|27
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|28
 
|28
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|29
 
|29
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|30
 
|30
−
|RESERVE, Not Connected
+
|RESERVE
−
|}
+
|NC
−
 
+
|}<br />
−
*J3 pin list
  −
 
   
{| class="wikitable"
 
{| class="wikitable"
 +
| colspan="3" |'''J3'''
 +
|-
 +
|'''Pin NO.'''
 +
|'''NAME'''
 +
|'''Remarks'''
 +
|-
 
|1
 
|1
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|2
 
|2
 
|MIPI_L0_N
 
|MIPI_L0_N
 +
|
 
|-
 
|-
 
|3
 
|3
 
|MIPI_L0_P
 
|MIPI_L0_P
 +
|
 
|-
 
|-
 
|4
 
|4
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|5
 
|5
 
|MIPI_CK_N
 
|MIPI_CK_N
 +
|
 
|-
 
|-
 
|6
 
|6
 
|MIPI_CK_P
 
|MIPI_CK_P
 +
|
 
|-
 
|-
 
|7
 
|7
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|8
 
|8
 
|MIPI_L1_N
 
|MIPI_L1_N
 +
|
 
|-
 
|-
 
|9
 
|9
 
|MIPI_L1_P
 
|MIPI_L1_P
 +
|
 
|-
 
|-
 
|10
 
|10
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|11
 
|11
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|12
 
|12
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|13
 
|13
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|14
 
|14
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|15
 
|15
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|16
 
|16
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|17
 
|17
 
|MIPI_MCLK0
 
|MIPI_MCLK0
 +
|
 
|-
 
|-
 
|18
 
|18
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|19
 
|19
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|20
 
|20
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|21
 
|21
−
|SDA_1.8V
+
|SDA
 +
|1.8V Level
 
|-
 
|-
 
|22
 
|22
−
|SCL_1.8V
+
|SCL
 +
|1.8V Level
 
|-
 
|-
 
|23
 
|23
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|24
 
|24
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|25
 
|25
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|26
 
|26
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|27
 
|27
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|28
 
|28
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|29
 
|29
 
|VCC5V
 
|VCC5V
 +
|PWR IN
 
|-
 
|-
 
|30
 
|30
 
|VCC5V
 
|VCC5V
−
|}
+
|PWR IN
−
 
+
|}<br />
−
*J4 pin list
  −
 
   
{| class="wikitable"
 
{| class="wikitable"
 +
| colspan="3" |'''J4'''
 +
|-
 +
|'''Pin NO.'''
 +
|'''NAME'''
 +
|'''Remarks'''
 +
|-
 
|1
 
|1
 
|MIPI_L0_N
 
|MIPI_L0_N
 +
|
 
|-
 
|-
 
|2
 
|2
 
|MIPI_L0_P
 
|MIPI_L0_P
 +
|
 
|-
 
|-
 
|3
 
|3
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|4
 
|4
 
|MIPI_L1_N
 
|MIPI_L1_N
 +
|
 
|-
 
|-
 
|5
 
|5
 
|MIPI_L1_P
 
|MIPI_L1_P
 +
|
 
|-
 
|-
 
|6
 
|6
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|7
 
|7
 
|MIPI_CK_N
 
|MIPI_CK_N
 +
|
 
|-
 
|-
 
|8
 
|8
 
|MIPI_CK_P
 
|MIPI_CK_P
 +
|
 
|-
 
|-
 
|9
 
|9
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|10
 
|10
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|11
 
|11
 
|MIPI_L2_P
 
|MIPI_L2_P
 +
|
 
|-
 
|-
 
|12
 
|12
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|13
 
|13
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|14
 
|14
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|15
 
|15
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|16
 
|16
 
|MIPI_MCLK0
 
|MIPI_MCLK0
 +
|
 
|-
 
|-
 
|17
 
|17
 
|GND
 
|GND
 +
|
 
|-
 
|-
 
|18
 
|18
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|19
 
|19
−
|RESERVE, Not Connected
+
|RESERVE
 +
|NC
 
|-
 
|-
 
|20
 
|20
−
|SCL_1.8V
+
|SCL
 +
|1.8V Level
 
|-
 
|-
 
|21
 
|21
−
|SDA_1.8V
+
|SDA
 +
|1.8V Level
 
|-
 
|-
 
|22
 
|22
 
|MIPI_PWR
 
|MIPI_PWR
 +
|
 
|-
 
|-
 
|23
 
|23
 
|CIF_PWR
 
|CIF_PWR
 +
|
 
|-
 
|-
 
|24
 
|24
 
|VCC5V
 
|VCC5V
 +
|
 
|}
 
|}
  
Retrieved from "http://wiki.veye.cc/index.php/Special:MobileDiff/2096"

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