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Line 1: + + − veye-lvds-290/327 is a camera module designed by Tianjin Zhongan Yijia technology co., LTD., with excellent low illumination and wide dynamic performance.This module only has 38*38*8mm, which is convenient for integration and can be connected to various embedded motherboards with adapter board.Suitable for machine vision, intelligent analysis, industrial control, face recognition, ADAS etc...+ − + Line 76:
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Line 100: + + − ==='''Diagram, Layout and Dimension'''===+ − − Line 115:
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Line 230: + + + + + + + + − === Imaging Effect ===+ − === CPU boards ===+
no edit summary
[[VEYE-LVDS-290/327/zh|查看中文]]
[[VEYE-LVDS-290/327/zh|查看中文]]
[[VEYE-LVDS-290/327|<big><big><big><big>VEYE-LVDS-290/VEYE-LVDS-327 Data Sheet</big></big></big></big>]]
===Introduction===
===Introduction===
VEYE-LVDS-290/327 is a camera module designed by TIANJIN DATA IMAGING TECHNOLOGY CO., LTD, with excellent low illumination and wide dynamic performance.This module only has 38*38*8mm, which is convenient for integration and can be connected to various embedded motherboards with adapter board.Suitable for machine vision, intelligent analysis, industrial control, face recognition, ADAS etc...
[[File:VEYE-MIPI-290327-FRONT.jpg|thumb|front]]
[[File:VEYE-MIPI-290327-FRONT.jpg|thumb|front]]
[[File:VEYE-MIPI-290327-back.jpg|thumb|back]]
[[File:VEYE-MIPI-290327-back.jpg|thumb|back]]
==='''Thechnical Detail'''===
===Thechnical Detail===
{| class="wikitable"
{| class="wikitable"
| colspan="2" |'''Technical Details'''
| colspan="2" |'''Technical Details'''
|-
|-
|Video Data Interface
|Video Data Interface
|MIPI:2 Data Lanes, CSI2 YUV422-8bit Data Type, Bandwidth 1.188Gbps
|LVDS:3 Data Lanes, bandwidth:1.5582Gbps
|-
|-
|IR-CUT Control
|IR-CUT Control
|38mm*38mm*8mm(not include lens and lens mount)
|38mm*38mm*8mm(not include lens and lens mount)
|}
|}
[[File:VEYE-MIPI-290-327接口图.jpg|thumb|VEYE-LVDS-290/327 User Interface]]
===Diagram, Layout and Dimension===
*'''J5 pin list'''
*[[File:VEYE-290327-用户接口实物图.png|thumb|connector position|alt=]][[File:VEYE-290-327用户接口丝印图.png|thumb|silk bottom&J5 pin number|alt=]]'''J5 pin list'''
{| class="wikitable"
{| class="wikitable"
|-
|-
|5
|5
|LVDS_L3_P
|RESERVE, Not Connected
|6
|6
|RESERVE, Not Connected
|RESERVE, Not Connected
|-
|-
|7
|7
|LVDS_L3_N
|RESERVE, Not Connected
|8
|8
|RESERVE, Not Connected
|RESERVE, Not Connected
|40
|40
|VCC3V3
|VCC3V3
|}[[File:VEYE-LVDS-290-327尺寸图（后视）.png|thumb|dimension(Back view)]]
|}
*'''J3 pin list'''
*'''J3 pin list'''
|}
|}
* '''Board Dimension'''
[[File:VEYE-MIPI-290-327 CAD drawing.jpg|thumb|VEYE-LVDS-290/327 CAD drawing|alt=|none|600x600px]]
[[Media:VEYE-MIPI-327 CAD.dwg|Download dwg file here]]
===Imaging Effect===
===CPU boards===
*Demo for FPGA usage
We provide a demo for FPGA usage,check link [https://github.com/veyeimaging/fpga here].
===Resources===
===Resources===
===Update Log===
===Update Log===